Chapter 2 Register Map and Descriptions
Static DIO Register-Level Programmer Manual
2-8
ni.com
Filter Enable Registers
FilterEnable(
N
)
This register enables filtering of input lines of port
N
, where
N
is the port number in
hexidecimal. In FilterEnable(
N
) registers, all lines of all ports share the same interval.
Note
Ports can range from 0 to 11 (0x0 to 0xB), depending on your device. For each port,
you must add an additional offset equal to 0x10 time the port number in hex.
Address Offset:
0x44 + 0x(
N
)0
Type:
Read-write
Size:
8-bit
Bit Map:
Bit
Name
Description
7–0
FLE(<7..0>)
Write a 1 to a bit to enable filtering for the corresponding
line.
For more information on digital filtering registers, refer to the
Filter Interval 32-Bit Register
section.
7
6
5
4
3
2
1
0
FLE(7)
FLE(6)
FLE(5)
FLE(4)
FLE(3)
FLE(2)
FLE(1)
FLE(0)
Содержание PCI-6528
Страница 1: ...PCI 6528...