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Chapter 3
Hardware Overview
Using the PXI Star Triggers
There are up to 13 PXI star triggers per chassis. Each trigger line is a dedicated connection
between the System Timing Slot (Slot 2) and one other slot. The
PXI Specification
, Revision 2.1,
requires that the propagation delay along each star trigger line be matched to within 1 ns. A
typical upper limit for the skew in most NI PXI chassis is 500 ps. The low skew of the PXI star
trigger bus is useful for applications that require triggers to arrive at several modules nearly
simultaneously.
The star trigger lines are bidirectional, so signals can be sent to System Timing Slot from a
module in another slot or from System Timing Slot to the other module.
You can independently select the output signal source for each PXI star trigger line from one of
the following sources:
•
PFI <0..5>
•
PXI/RTSI triggers <0..7> (PXI_TRIG <0..7>)
•
Another PXI star trigger line (PXI_STAR <0..12>)
•
Global software trigger
•
PXI_Trig/PXI_Star synchronization clock
•
CLKIN
Refer to the
section for a list of possible sources for the
synchronization clock for PXI Star trigger outputs.
Note
The PXI_Trig/PXI_Star synchronization clock is the same for all routing
operations in which PXI_TRIG <0..7> or PXI_STAR <0..12> is defined as the
output, although the divide-down ratio for this clock (full rate, first divider,
second divider) may be chosen on a per route basis.
Choosing the Type of Routing
The NI PXI-665
x
routes signals in one of two ways: asynchronously or synchronously. The
following sections describe the two routing types and the considerations for choosing each type.
Asynchronous Routing
Asynchronous routing is the most straightforward method of routing signals. Any asynchronous
route can be defined in terms of two signal locations: a source and a destination. A digital pulse
or train comes in on the source and is propagated to the destination. When the source signal goes
from low to high, this rising edge is transferred to the destination after a propagation delay
through the module. Figure 3-9 illustrates an asynchronous routing operation.
