4.
Either discover a LabVIEW FPGA target in your system or create a new system and
specify an FPGA target for which to construct a project.
5.
Click
Finish
in the
Project Preview
dialog box.
6.
Click
File
»
Save
and specify a name for the project.
Creating an FPGA Target VI
1.
In the
Project Explorer
window, expand
FPGA Target
.
2.
Right-click
FPGA Target
and select
New
»
FPGA Base Clock
.
3.
In the
Resource
pull-down menu, select
200 MHz Clock
and click
OK
.
4.
Right-click
IO Module
in the
Project Explorer
window and select
Properties
.
5.
Select
Enable IO Module
.
6.
Select the NI 5791 from the
IO Module
list. The available CLIP for the NI 5791 is
displayed in the
Component Level IP
pane.
7.
Select NI 5791 in the
Name
list of the
Component Level IP
pane.
8.
In the
Clock Selections
category, select
200 MHz Clock
from the pull-down menu for
Clock 200 MHz
. Leave
Clock 40 MHz
configured as the
Top-Level Clock
.
9.
Click
OK
.
Note
Configuring these clocks is required for proper CLIP operation. Refer to
the NI 5791 CLIP topics in the
NI FlexRIO Help
for more information about
configuring your clocks.
10. Select
File
»
Open
and select
<labview>\instr.lib\ni579x\config\v1\FPGA
\Public\ni579x Config FPGA Template.vi
.
11. Select
File
»
Save As
.
12. Select
Copy
»
Open Additional Copy
and check
Add Copy to <your project
name>.lvproj
.
13. Select the destination folder for the new file, specify a file name, and click
OK
. Use this
FPGA VI with the NI-579x Configuration Design Library.
14. In the
Project Explorer
window, expand
IO Module Tree View
. Use any of the
elements under
IO Module (NI 5791 : NI 5791)
in the block diagram of the FPGA VI.
Note
Use Rx I, Rx Q, Tx I, and Tx Q in a single-cycle Timed Loop using the
Sample Clock provided by the CLIP. Sample Clock x2 runs at twice the rate of
the Sample clock. The DSP and Synchronization Design Libraries use Sample
Clock x2.
15. Add any FPGA code, controls, and indicators that you need. Refer to
Streaming.lvproj
for example FPGA code, controls, and indicators.
16. Click the
Run
button. LabVIEW creates a default build specification and begins
compiling the VI. The
Generating Intermediate Files
window displays the code
generation process. The
Compilation Status
window displays the progress of the
compilation. The compilation takes several minutes.
17. Click
Close
in the
Compilation Status
window.
18. Save and close the VI .
19. Save the project.
NI 5791R User Manual and Specifications | © National Instruments | 15
