National Instruments AT-MIO-16D, Руководство пользователя

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Programming Chapter 4
AT-MIO-16D User Manual 4-56 © National Instruments Corporation
First, make certain that Counter 3 is reset as described in the Resetting the Hardware after a
Data Acquisition Operation section later in this chapter. If Counter 3 is not reset, it may be
driving the EXTCONV* line and therefore prevent another signal from successfully driving the
line high or low.
1. Select analog input channel and gain.
The analog input channel and gain are selected by writing to the Mux-Gain Register. Bits 7 and
6 control the gain, and bits 3 through 0 select the analog input channel. See the Mux-Gain
Register bit description earlier in this chapter for gain and analog input channel bit patterns. Set
up the bits as given in the Mux-Gain Register bit description and write to the Mux-Gain Register.
The Mux-Gain Register needs to be written to only when you need to change the analog input
channel or gain setting.
2. Clear the A/D circuitry.
Before starting the data acquisition operation, the A/D FIFO must be emptied to clear out any old
A/D conversion results. Write 0 to the A/D Clear Register to empty the FIFO.
3. Service the data acquisition operation.
Once an external trigger starts the data acquisition operation, the operation is serviced by reading
the A/D FIFO Register every time an A/D conversion result becomes available. To do this,
perform the following sequence until the desired number of conversion results have been read:
a. Read the Status Register (16-bit read).
b. If the CONVAVAIL bit is set (bit 13), read the A/D FIFO Register to obtain the result.
Interrupts or DMA can also be used to service the data acquisition operation. These topics are
discussed later in this chapter.
Two error conditions may occur during a data acquisition operation–an overflow error or an
overrun error. These error conditions are reported through the Status Register and should be
checked every time the Status Register is read to check the CONVAVAIL bit. If either of these
error conditions occurs, the data acquisition operation stops.
An overflow condition occurs if more than 512 A/D conversions have been stored in the A/D
FIFO without the A/D FIFO being read; that is, the A/D FIFO is full and cannot accept any more
data. This condition occurs if the software loop reading the A/D FIFO Register is not fast
enough to keep up with the A/D conversion rate. When an overflow occurs, at least one A/D
conversion result is lost. An overflow condition has occurred if the OVERFLOW bit in the
Status Register is set.
An overrun condition occurs if an A/D conversion is initiated before the previous conversion is
finished. This condition may result in one or more missing A/D conversions. This condition
occurs if the sample interval is too small (sample rate is too high). An overrun condition has
occurred if the OVERRUN bit in the Status Register is set. The maximum recommended single-
channel data acquisition rate for the AT-MIO-16D is 100 ksamples/sec.