
CHAPTER 3
CHAPTER 3
CHAPTER 3
CHAPTER 3
CHAPTER 3
AWARD
AWARD
AWARD
AWARD
AWARD
®
BIOS SETUP
BIOS SETUP
BIOS SETUP
BIOS SETUP
BIOS SETUP
3-15
Auto Configuration
This item allows you to select pre-determined optimal values of
chipset parameters. When Disabled, chipset parameters revert to setup
information stored in CMOS. Many fields in this screen are not available
when Auto Configuration is Enabled. The settings are Enabled or Disabled.
Note: When this item is enabled, the pre-defined items will become SHOW-
ONLY.
Refesh Cycle Time
DRAM needs data refresh; otherwise the data will be lost. The
normal refresh rate is 15.6us. However the progress of DRAM technology
makes the DRAM be able to suffer longer refresh time, such as 15.6 x 1, 15.6
x 2, 15.6 x 3, and so on. The settings are 15.6, 62.4, 124.8, or 187.2.
RAS Pulse Width Refresh
Select the number of CPU clock cycles for RAS DRAM refresh.
Fewer clock cycles give faster performance, and more cycles give more
stable performance. The settings are 4T, 5T, 6T, or 7T.
RAS Precharge Time
Defines the length of time the Row Address Strobe is allowed to
precharge. The settings are 2T, 3T, 4T, or 5T.
RAS to CAS Delay
This sets the relative delay between the row and column address
strobes. The settings are 2T, 3T, 4T, or 5T.
CPU to PCI Post Write
Select enabled to use a fast buffer for posting writes to memory.
Using a fast buffer releases the CPU before completion of a write cycle to
DRAM.
Starting Point of Paging
This item allows you to select the “Starting Point of Paging”
function cycle of DRAM. The settings are 1T, 2T, 4T, or 8T.
Содержание Baby AT SI19
Страница 1: ...Version 1 1 i ...
Страница 4: ...Chapter 1 Introduction 1 1 iv ...
Страница 8: ...viii ...
Страница 45: ...CHAPTER2 HARDWARE INSTALLATION 2 33 ...