Index
IN-2
Computer Group Literature Center Web Site
I
N
D
E
X
conductive chassis rails (EMC compliance)
configurable items, MVME162P4 board
configuration switches
S3 (Flash Write Enable mode)
S3 (MC2 DRAM size)
,
S4 (EPROM/Flash selection)
S4 (general-purpose readable switch)
S4 (software-readable switch)
S5 (IP DMA snoop control)
S5 (IP reset mode)
S5 pin 3 (IP reset mode)
S5 pin 4 (Flash write enable)
S5 pins 1/2 (IP DMA snoop control)
S6 (MCECC DRAM size)
configuration switches, location of
Configure Board Information Block (CNFG)
firmware command
configuring
162Bug parameters
hardware
IP base addresses
VMEbus interface
connection diagrams
EIA-232-D
EIA-530
connector pin assignments
IndustryPack (IP)
control/status registers
controller LUN (CLUN)
,
controller modules (disk/tape)
controller modules (network)
cooling requirements
CSR bit IP32 (IP bus clock)
D
data bus structure, MVME162P4
data circuit-terminating equipment (DCE)
data sheets
date and time, setting
DCE (data circuit-terminating equipment)
debugger
commands
firmware (162Bug)
prompt
device LUN (DLUN)
,
diagnostic facilities
dimensions, base board
direct memory access (DMA)
directories, switching
disk/tape controller modules supported
DLUN (device LUN)
,
DMA (direct memory access)
DRAM (dynamic RAM)
base address
options
E
EIA-232-D
connection diagrams
ports
SIM part numbers
EIA-485/EIA-422
connection diagrams
EIA-530
connection diagrams
EIA-530/V.36 SIM part numbers
EMC regulatory compliance
ENV command parameters
environmental parameters
and Flash memory
size select header (J23)
socket
EPROM/Flash selection (S4)
Содержание MVME162P-244 Series
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Страница 136: ...D 6 Computer Group Literature Center Web Site Disk Tape Controller Data D ...