Motorola MVME162P-244 Series, Инструкция по установке и эксплуатации

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Functional Description
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EPROM and Flash Memory
The MVME162P4 implementation includes 1MB or 2MB Flash memory.
Flash memory is a single Intel device (28F016SA on the MVME162P4)
organized in a 1MB x 8 or 2Mb x 8 configuration. For information on
programming Flash, refer to the Intel documents listed under
Manufacturer’s Documents in the Related Documentation appendix.
The Flash write enable signal is controlled by:
❏
A bit in the Flash Access Time Control register in the Petra ASIC
❏
A board-level configuration jumper (J24) and configuration switch
(S5, segment 4) which determine the status of Flash write protection
on the board
Refer to the MVME1X2P4 VME Embedded Controller Programmer’s
Reference Guide for specifics.
The EPROM location is a standard JEDEC 32-pin PLCC capable of 4-
Mbit densities organized as a 512 Kb x 8 device. The setting of a
configuration switch (line GPI3, segment 5 on S4), allows reset code to be
fetched either from Flash memory (S4 segment 5 set to
OFF
) or from
EPROMs (S4 segment 5 set to
ON
).
Note that MVME162P4 models ordered without the VMEbus interface are
shipped with Flash memory blank (the factory uses the VMEbus to
program the Flash memory with debugger code). To use the debugger
firmware, be sure that configuration switch S4 is set for the EPROM
memory map. Refer to chapters 1 and 3 for further details.
Battery-Backed-Up RAM and Clock
An M48T58 RAM and clock chip is used on the MVME162P4. This chip
provides a time-of-day clock, oscillator, crystal, power fail detection,
memory write protection, 8KB of RAM, and a battery in one 28-pin
package. The clock provides seconds, minutes, hours, day, date, month,
and year in BCD 24-hour format. Corrections for 28-, 29- (leap year), and
30-day months are made automatically. No interrupts are generated by the
clock. Although the M48T58 is an 8-bit device, the interface provided by
the Petra chip supports 8-, 16-, and 32-bit accesses to the M48T58. Refer