Functional Description
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4-19
4
VMEchip2 and Petra/MC2 descriptions in the MVME1X2P4 VME
Embedded Controller Programmer’s Reference Guide for detailed
programming information.
The access timer logic is duplicated in the VMEchip2 and Petra/MC2
ASICs. Because the local bus timer in the VMEchip2 can detect an
offboard access and the Petra/MC2 local bus timer cannot, the timer in the
VMEchip2 ASIC is used in all cases except for versions of the
MVME162P4 which do not include the VMEbus interface (i.e., boards
ordered with a “No VMEbus Interface” option).
Local Bus Arbiter
The local bus arbiter implements a fixed priority (see
Connectors
The MVME162P4 has two 96-position DIN connectors: P1 and P2. P1
rows A, B, C, and P2 row B provide the VMEbus interconnection. P2 rows
A and C provide the connection to the SCSI bus, serial ports, and Ethernet.
The serial ports on the MVME162P4 are also connected to two 25-pin DB-
25 female connectors, J18 and J25, on the front panel. The four IP modules
connect to the MVME162P4 by four pairs of 50-pin connectors. Four
additional 50-pin connectors behind the front panel are for external
connections to IP signals.
Pin assignments for the connectors on the MVME162P4 are listed in
Chapter 5.
Table 4-2. Local Bus Arbitration Priority
Device
Priority
Note
LAN 0
Highest
Industry Pack DMA
1
SCSI 2
...
VMEbus
3
Next Lowest
MC680x0/MC68LC0x0
4
Lowest
Содержание MVME162P-244 Series
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