Motorola MCU M68MPB916R3, Руководство пользователя

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MEVB SUPPORT INFORMATION
M68MPB16R3UM/D 4-9 9
Table 4-8. Logic Analyzer Connector J14 Pin Assignments (continued)
Pin Mnemonic Signal
9 – 15 IRQ1 – IRQ7
PF1 – PF7
TARGET INTERRUPT REQUEST 1 - 7 – Active-low
input signals from the target that asynchronously
provides an interrupt priority level to the CPU. IRQ1
has the lowest priority, IRQ7 has the highest.
PORT F (bits 1 - 7) – General purpose Iinput/output
lines.
16 – 19 SPARE No connection
20 GND GROUND
Table 4-9. Logic Analyzer Connector J15 Pin Assignments
Pin Mnemonic Signal
1 – 3 SPARE No connection
4 – 8 GND GROUND
9, 10 CPWM19,
CPWM18
CONFIGURABLE PULSE WIDTH MODULATION
SUBMODULE 19 and 18 – creates a variable pulse
width output signal at a wide range of frequencies.
11, 12 CTS16B,
CTS16A
CONFIGURABLE TIMER SINGLE-ACTION
CHANNEL 16 A and B – I/O signals that function as
single-action capture/compare channels for the CTM.
13, 14 CTS14B,
CTS14A
CONFIGURABLE TIMER SINGLE-ACTION
CHANNEL 14 A and B – I/O signals that function as
single-action capture/compare channels for the CTM.
15, 16 CTS12B,
CTS12A
CONFIGURABLE TIMER SINGLE-ACTION
CHANNEL 12 A and B – I/O signals that function as
single-action capture/compare channels for the CTM.
17 CTS10B CONFIGURABLE TIMER SINGLE-ACTION
CHANNEL 10 B – I/O signals that function as single-
action capture/compare channels for the CTM.
18, 19 SPARE No connection
20 GND GROUND