PROGRAMMING MODEL
MOTOROLA
PROGRAM CONTROL UNIT
5 - 9
This special-purpose address register is stacked when program looping is initialized,
when a JSR is performed, or when interrupts occur (except for no-overhead fast
interrupts).
5.4.2 Status Register
The 16-bit SR consists of a mode register (MR) in the high-order eight bits and a condition
code register (CCR) in the low-order eight bits, as shown in Figure 5-5. The SR is stacked
when program looping is initialized, when a JSR is performed, or when interrupts occur,
(except for no-overhead fast interrupts).
The MR is a special purpose control register which defines the current system state of the
processor. The MR bits are affected by processor reset, exception processing, the DO,
end current DO loop (ENDDO), return from interrupt (RTI), and SWI instructions and by
instructions that directly reference the MR register, such as OR immediate to control reg-
ister (ORI) and AND immediate to control register (ANDI). During processor reset, the
interrupt mask bits of the MR will be set. The scaling mode bits, loop flag, and trace bit will
be cleared.
All bits are cleared after hardware reset except bits 8 and 9 which are set to ones.
15
14
13
12
11 10
9
8
7
6
5
4
3
2
1
0
MR
CCR
*
LF DM
T
S1
S0
I1
I0
S
L
E
U
N
Z
V
C
Figure 5-5 Status Register Format
CARRY
OVERFLOW
ZERO
NEGATIVE
UNNORMALIZED
EXTENSION
LIMIT
SCALING
INTERRUPT MASK
SCALING MODE
RESERVED
TRACE MODE
DOUBLE PRECISION
MULTIPLY MODE
LOOP FLAG
Bits 12 and 16 to 23 are reserved, read as zero and should be written with zero for future compatibility
Содержание DSP56K
Страница 12: ...xii LIST of TABLES MOTOROLA List of Tables Continued Table Page Number Title Number ...
Страница 13: ...MOTOROLA DSP56K FAMILY INTRODUCTION 1 1 SECTION 1 DSP56K FAMILY INTRODUCTION ...
Страница 25: ...MOTOROLA DSP56K CENTRAL ARCHITECTURE OVERVIEW 2 1 SECTION 2 DSP56K CENTRAL ARCHITECTURE OVERVIEW ...
Страница 31: ...MOTOROLA DATA ARITHMETIC LOGIC UNIT 3 1 SECTION 3 DATA ARITHMETIC LOGIC UNIT ...
Страница 50: ...DATA ALU SUMMARY 3 20 DATA ARITHMETIC LOGIC UNIT MOTOROLA ...
Страница 51: ...MOTOROLA ADDRESS GENERATION UNIT 4 1 SECTION 4 ADDRESS GENERATION UNIT ...
Страница 77: ...MOTOROLA PROGRAM CONTROL UNIT 5 1 SECTION 5 PROGRAM CONTROL UNIT ...
Страница 124: ...INSTRUCTION GROUPS 6 30 INSTRUCTION SET INTRODUCTION MOTOROLA ...
Страница 125: ...MOTOROLA PROCESSING STATES 7 1 SECTION 7 PROCESSING STATES STOP WAIT EXCEPTION NORMAL RESET ...
Страница 167: ...STOP PROCESSING STATE MOTOROLA PROCESSING STATES 7 43 ...
Страница 168: ...STOP PROCESSING STATE 7 44 PROCESSING STATES MOTOROLA ...
Страница 169: ...MOTOROLA PORT A 8 1 SECTION 8 PORT A ...
Страница 176: ...PORT A INTERFACE 8 8 PORT A MOTOROLA ...
Страница 177: ...MOTOROLA PLL CLOCK OSCILLATOR 9 1 SECTION 9 PLL CLOCK OSCILLATOR x x d Φ VCO ...
Страница 191: ...10 2 ON CHIP EMULATION OnCE MOTOROLA SECTION 10 ON CHIP EMULATION OnCE ...
Страница 218: ...USING THE OnCE MOTOROLA ON CHIP EMULATION OnCE 10 29 ...
Страница 604: ...INSTRUCTION ENCODING A 338 INSTRUCTION SET DETAILS MOTOROLA ...
Страница 605: ...MOTOROLA BENCHMARK PROGRAMS B 1 APPENDIX B BENCHMARK PROGRAMS T T T T T P1 P3 P2 P4 T T T ...
Страница 606: ...SECTION CONTENTS B 2 BENCHMARK PROGRAMS MOTOROLA SECTION B 1 INTRODUCTION 3 SECTION B 2 BENCHMARK PROGRAMS 3 ...
Страница 609: ...BENCHMARK PROGRAMS MOTOROLA BENCHMARK PROGRAMS B 5 ...
Страница 611: ...BENCHMARK PROGRAMS MOTOROLA BENCHMARK PROGRAMS B 7 ...
Страница 613: ...BENCHMARK PROGRAMS MOTOROLA BENCHMARK PROGRAMS B 9 ...
Страница 615: ...BENCHMARK PROGRAMS MOTOROLA BENCHMARK PROGRAMS B 11 ...