ADDRESSING
MOTOROLA
ADDRESS GENERATION UNIT
4 - 9
the AGU and are described in the following paragraphs.
4.4.1 Address Register Indirect Modes
When an address register is used to point to a memory location, the addressing mode is
called “address register indirect” (see Table 4-1). The term indirect is used because the
register contents are not the operand itself, but rather the address of the operand. These
addressing modes specify that an operand is in memory and specify the effective
address of that operand.
A portion of the data bus movement field in the instruction specifies the memory space to
be referenced. The contents of specific AGU registers that determine the effective
address are modified by arithmetic operations performed in the AGU. The type of
address arithmetic used is specified by the address modifier register, Mn. The offset reg-
ister, Nn, is only used when the update specifies an offset.
Not all possible combinations are available, such as + (Rn). The 24-bit instruction word
size is not large enough to allow a completely orthogonal instruction set for all instruc-
tions used by the DSP.
An example and description of each mode is given in the following paragraphs. SEC-
TION 6 - INSTRUCTION SET INTRODUCTION and APPENDIX A - INSTRUCTION SET
DETAILS give a complete description of the instruction syntax used in these examples.
In particular, XY: memory references refer to instructions in which an operand in X mem-
ory and an operand in Y memory are referenced in the same instruction.
4.4.1.1
No Update
The address of the operand is in the address register, Rn (see Table 4-1). The contents
of the Rn register are unchanged by executing the instruction. Figure 4-4 shows a MOVE
instruction using address register indirect addressing with no update. This mode can be
used for making XY: memory references. This mode does not use Nn or Mn registers.
4.4.1.2
Postincrement By 1
The address of the operand is in the address register, Rn (see Table 4-1 and Figure 4-5).
After the operand address is used, it is incremented by 1 and stored in the same address
register. This mode can be used for making XY: memory references and for modifying
the contents of Rn without an associated data move.
4.4.1.3
Postdecrement By 1
The address of the operand is in the address register, Rn (see Table 4-1 and Figure 4-6).
After the operand address is used, it is decremented by 1 and stored in the same
address register. This mode can be used for making XY: memory references and for
Содержание DSP56K
Страница 12: ...xii LIST of TABLES MOTOROLA List of Tables Continued Table Page Number Title Number ...
Страница 13: ...MOTOROLA DSP56K FAMILY INTRODUCTION 1 1 SECTION 1 DSP56K FAMILY INTRODUCTION ...
Страница 25: ...MOTOROLA DSP56K CENTRAL ARCHITECTURE OVERVIEW 2 1 SECTION 2 DSP56K CENTRAL ARCHITECTURE OVERVIEW ...
Страница 31: ...MOTOROLA DATA ARITHMETIC LOGIC UNIT 3 1 SECTION 3 DATA ARITHMETIC LOGIC UNIT ...
Страница 50: ...DATA ALU SUMMARY 3 20 DATA ARITHMETIC LOGIC UNIT MOTOROLA ...
Страница 51: ...MOTOROLA ADDRESS GENERATION UNIT 4 1 SECTION 4 ADDRESS GENERATION UNIT ...
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Страница 124: ...INSTRUCTION GROUPS 6 30 INSTRUCTION SET INTRODUCTION MOTOROLA ...
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