25
M722 N/B MAINTENANCE
M722 N/B MAINTENANCE
0.2-15 IEEE 1394 : NEC
U
PD72870A
-The
µ
PD72870A is the LSIs which integrated OHCI-Link and PHY function into a single chip.
-The
µ
PD72870A comply with the P1394a draft 2.0 specifications and the OpenHCI IEEE1394 1.0 and work up to 400 Mbps.
-Compliant with Link Layer Services as defined in 1394 Open Host Controller Interface specification release 1.0
-Compliant with Physical Layer Services as defined in P1394a draft 2.0 (Data Rate 100/200/400 Mbps)
-Compliant with protocol enhancement as defined in P1394a draft 2.0
-Modular 32-bit host interface compliant to PCI Specification release 2.1
-Support PCI-Bus Power Management Interface Specification release 1.0
-Modular 32-bit host interface compliant to Card Bus Specification
-Cycle Master and Isochronous Resource Manager capable
-Built-in FIFOs for isochronous transmit (1024 bytes), asynchronous transmit (1024 bytes), and receive (2048bytes)
-32-bit CRC generation and checking for receive/transmit packets
-4 isochronous transmit DMAs and 4 isochronous receive DMAs supported
-32-bit DMA channels for physical memory read/write
-Clock generation by 24.576 MHz X?
al
-Internal control and operational registers direct-mapped to PCI configuration space
-2-wire Serial EEPROM
TM
interface supported
-Separate power supply Link and PHY
Figure 9 :Block Diagrams