124
Appendix A
BIOS POST ERROR CODE
SEC Error Codes
0x0C
–
0x0D
Reserved for future AMI SEC error codes
0x0E
Microcode not found
0x0F
Microcode not loaded
Status Code
Description
Progress Codes
0x10
PEI Core is started
0x11
Pre-memory CPU initialization is started
0x12
Pre-memory CPU initialization (CPU module specific)
0x13
Pre-memory CPU initialization (CPU module specific)
0x14
Pre-memory CPU initialization (CPU module specific)
0x15
Pre-memory North Bridge initialization is started
0x16
Pre-Memory North Bridge initialization (North Bridge module specific)
0x17
Pre-Memory North Bridge initialization (North Bridge module specific)
0x18
Pre-Memory North Bridge initialization (North Bridge module specific)
0x19
Pre-memory South Bridge initialization is started
0x1A
Pre-memory South Bridge initialization (South Bridge module specific)
0x1B
Pre-memory South Bridge initialization (South Bridge module specific)
0x1C
Pre-memory South Bridge initialization (South Bridge module specific)
0x1D
–
0x2A
OEM pre-memory initialization codes
0x2B
Memory initialization. Serial Presence Detect (SPD) data reading
0x2C
Memory initialization. Memory presence detection
0x2D
Memory initialization. Programming memory timing information
0x2E
Memory initialization. Configuring memory
0x2F
Memory initialization (other).
0x30
Reserved for ASL (see ASL Status Codes section below)
0x31
Memory
0x32
CPU post-memory initialization is started
0x33
CPU post-memory initialization. Cache initialization
0x34
CPU post-memory initialization. Application Processor(s) (AP) initialization
0x35
CPU post-memory initialization. Boot Strap Processor (BSP) selection
0x36
CPU post-memory initialization. System Management Mode (SMM) initialization
0x37
Post-Memory North Bridge initialization is started
0x38
Post-Memory North Bridge initialization (North Bridge module specific)
0x39
Post-Memory North Bridge initialization (North Bridge module specific)
0x3A
Post-Memory North Bridge initialization (North Bridge module specific)
0x3B
Post-Memory South Bridge initialization is started
0x3C
Post-Memory South Bridge initialization (South Bridge module specific)
0x3D
Post-Memory South Bridge initialization (South Bridge module specific)
0x3E
Post-Memory South Bridge initialization (South Bridge module specific)
0x3F-0x4E
OEM post memory initialization codes
0x4F
DXE IPL is started
PEI Error Codes
0x50
Memory initialization error. Invalid memory type or incompatible memory speed
0x51
Memory initialization error. SPD reading has failed
0x52
Memory initialization error. Invalid memory size or memory modules do not
match.
Содержание E8020
Страница 1: ...E8020 OCP Computing Sled User Manual Version 1 0 ...
Страница 7: ...2 APPENDIX A 124 ...
Страница 12: ...7 2 1 2 Ultra Note 4x U 2 drives One FHHL PCIe card ...
Страница 29: ...24 2 2 5 Release the Drive A Pull the locking Drive lever open in the direction of arrow B Take out Drive ...
Страница 32: ...27 B Push the Right Left handle bar to lock the Drive Cage ...
Страница 33: ...28 C Insert the Riser Card ...
Страница 34: ...29 D Fasten the latch to lock the riser card E Open the retainer as shown ...
Страница 36: ...31 3 Mainboard Information 3 1 Board Introduction Here are different views of the main board ...
Страница 39: ...34 3 4 Block Diagram ...
Страница 47: ...42 CPU 0 Information ...
Страница 50: ...45 4 3 4 Serial Port Console Redirection ...
Страница 54: ...49 Console Redirection Settings COM1 ...
Страница 62: ...57 4 3 7 USB Configuration ...
Страница 73: ...68 Socket 0 Information View Information related to Socket 0 ...
Страница 94: ...89 4 9 Save Exit ...
Страница 127: ...122 Here is the example of OOB BIOS update IP Your BMC IP C439_TGPSNTT_101 BIN The BMC image you received ...
Страница 128: ...123 6 2 2 BMC update You can do BMC update via local or OOB Example of local BMC update Example of BMC update via OOB ...