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VSC8502 Reference Board

VPPD-03822 VSC8502 User Guide Revision 1.0

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3

General Description

The evaluation board, shown in Figure 1, provides the user a way to evaluate the VSC8502 device in 
multiple configurations. Two RJ-45 connectors are provided for copper media interfaces. The MAC 
interface (RGMII) is exposed via 0.1 inch steakheaders, J31 - J53. For standalone access to all of the 
features of the device, an external microcontroller is used to configure the VSC8502 via the MDIO bus. 
The GUI enables the user to read and write device registers.

3.1

Copper Port RJ45 Connections

PHY ports 0 and 1 use generic RJ45 connectors with discrete Halo TG1G-S032NYRL magnetics.

3.2

RGMII MAC Connectors

The parallel MAC interface is available through 0.1 inch headers. The layout is such that by installing 
jumpers the RX and TX signals can be looped on board. When mating to a MAC board, a specialized 
cable will need to be constructed.

The following is the RGMII connectors positioned in the board:

Table 1 • RGMII Connector Positions

Channel 1

Channel 0

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

RXD2

RXDV_CTL

RXD0

RXD3

RXD1

RXCLK

RXD3

RXDV_CTL

RXD2

RXD0

RXD1

RXCLK

TXD2

TXDV_CTL

TXD0

TXD3

TXD1

TXCLK

TXD3

TXDV_CTL

TXD2

TXD0

TXD1

TXCLK

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

3.3

Static Controls (SW1)

Three static control signals are set by the DIP switch SW1.

Signal Name

Description

Position for Normal Operation

REFCLK_SEL

Select the input frequency to the device.
0: 125 MHz
1: 25 MHz

1

NRESET

Hold the device in rest.
0: Reset state
1: Normal device operation

1

COMA_MODE

Hold the device in coma state.
0: Disabled
1: Enabled

0

3.4

Clocking

VSC8502RD board is equipped with a 2.5V CMOS, 25.00 MHz standard clock oscillator (U5), while the 
VSC8502RD-VR board uses a 3.3 V CMOS version.

3.5

Software Interface Microcontroller Card

A Silabs F340 microcontroller is included to facilitate a software interface to the registers on the 
VSC8502 through a USB port.

Note: Alternatively, a Rabbit card is available for an IP-based manager of the PHY register space, 
installed in the keep-out area (U6) of the board’s top-side. Or, MDC and MDIO can be accessed on stake 
header J10 if desired for another microcontroller to host the PHY register space.

Содержание VSC8502

Страница 1: ...VSC8502 User Guide VSC8502 Reference Board May 2014...

Страница 2: ...5 Software Interface Microcontroller Card 3 3 6 Software Interface Microcontroller Card 4 4 Quick Start 5 4 1 Connecting the Power Supply 5 4 2 PC Software Installation 5 4 3 Connecting to the Board...

Страница 3: ...ory The revision history describes the changes that were implemented in this document The changes are listed by revision starting with the most current publication 1 1 Revision 1 0 Revision 1 0 of thi...

Страница 4: ...also optimizes power consumption in all link operating speeds and features Wake on LAN WOL power management using magic packets This document describes the architecture and usage of the VSC8502RD and...

Страница 5: ...tions Channel 1 Channel 0 GND GND GND GND GND GND GND GND GND GND GND GND RXD2 RXDV_CTL RXD0 RXD3 RXD1 RXCLK RXD3 RXDV_CTL RXD2 RXD0 RXD1 RXCLK TXD2 TXDV_CTL TXD0 TXD3 TXD1 TXCLK TXD3 TXDV_CTL TXD2 TX...

Страница 6: ...board there are three on board regulators that will convert the 5 V supplied by the PC to 1 0 V and 2 5 V for the VSC8502 and 3 3 V for other devices For the VSC8502RD VR board there is only one on bo...

Страница 7: ...the GUI by launching the setup exe file USB communication is assisted by the Silabs USBXpress drive If not present on the PC the user will need to download the USBXpress Development Kit from the Sili...

Страница 8: ...recommended to ensure correct performance over the greatest set of user scenarios for the PHY After initialization is performed refer to the PHY Datasheet section on Configuring the PHY and PHY Inter...

Страница 9: ...mmonly used speed advertisement definitions are as follows Table 2 Auto Negotiation Advertisements MII reg 4 bits 8 7 MII reg 4 bits 6 5 MII reg 9 bits 12 11 MII reg 9 bits 9 8 1000BT Master mode N A...

Страница 10: ...MII 19 7 0 False carrier MII 20 7 0 Disconnects MII 21 7 0 CRC errors ExtMII 23 7 0 5 3 Near End Loopback When the near end loopback test feature is enabled the transmitted data is looped back in the...

Страница 11: ...mine suitability of any products and to test and verify the same The information provided by Microsemi hereunder is provided as is where is and with all faults and the entire risk associated with such...

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