Meiko Computing Surface CS-2, Руководство пользователя

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S1002–10M128.02
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The processor slots are numbered from 0 to 3, from right to left (when viewed
from the front) as shown in Figure 4-5.
Figure 4-5 MK405 Processor Numbering
Memory
Up to 16 single in-line memory modules (SIMMs) may be fitted to the MK405
board (JEDEC 36 bit SIMMs). The array is constructed of 4 groups of 4 SIMMs,
one group for each processor — see Figure 4-6. Within each group the SIMMs
must be identical but there is no requirement for the groups to be the same.
Figure 4-6 Memory slots on an MK405 showing the allocation of slots to
each of the 4 processors.
SIMMs can be either 4 Mbit DRAM or 16 Mbit DRAM technology, either single
or double sided. This gives a total minimum memory configuration of 64 Mbytes
and a maximum of 512 Mbytes (16 – 128 Mbytes per processor).
Slot 0 Slot 1 Slot 2 Slot 3
Front
Processor 3
Processor 2
Processor 1
Processor 0
Front Panel