13
Programming BULK-IN Transfers
The CPU issues an IN token to request a peripheral to send it BULK data . Then the SIE
transfers data into its RCVFIFO, and ACKS the transfer.
The CPU writes HXFR = 0000eeee (Table 4) to initiate the IN transfer, where eeee is the
desired endpoint address.
The SIE sends an IN token, the address in the PERADDR register, the endpoint number in
EP[3:0], and a CRC5. It then waits 6.5 bit times for the peripheral to respond. If the peripheral
responds with a DATA0 or DATA1 PID followed by data, the SIE loads the received data bytes
into the RCVFIFO and counts the bytes. At the end of the packet the SIE checks the packet for
errors, updates the RCVBC register and HRSLT bits, and then asserts the HXFRDNIRQ bit.
Depending on the transfer outcome, the SIE may or may not assert the RCVDAVIRQ.
If the IN data was error-free (HRSLT = 0000), the SIE sends an ACK token, complements the
data toggle, and asserts the RCVDAVIRQ to indicate that new IN data is valid.
If the IN data was error-free but there was a data toggle mismatch (the DATA0 or DATA1 PID
send by the peripheral did not match the endpoint toggle value), the SIE sends the ACK
handshake, but it does not complement the data toggle or assert the RCVDAVIRQ. The SIE sets
HRSL = 0110 (Toggle Error) for this condition.
This situation would happen if the peripheral
received a corrupted ACK handshake from the previous IN transfer. In this case the host ignores
the data in the RCVDATA FIFO, because it represents data that the peripheral mistakenly resent
when it missed the last ACK handshake. By ACK-ing the transfer and not updating its own
toggle bit, the SIE causes the peripheral to complement
its
toggle bit, thus forcing the data toggle
mechanism back into sync.
If the HRSLT bits indicate a data error, the SIE does not send the ACK, complement the data
toggle, or assert the RCVDAVIRQ bit.
The CPU responds to the HXFRDNIRQ indication by examining the result bits in HRSLT[3:0].
If the result is 0000 (success), the CPU reads RCVBC to determine the byte count, and then
reads that number of bytes using repeated reads to the RCVFIFO register (page
48
). After the
CPU retrieves the data, it clears the RCVDAVIRQ bit (by writing 1 to it). If there is another
buffer of IN data in the double-buffered RCVFIFO, the SIE immediately re-asserts the
RCVDAVIRQ bit.
Note:
The SIE does not automatically retry an IN transfer that indicates an error. Instead, it
notifies the CPU (through the HXFRDNIRQ and HRSLT bits) of the error and generates the
correct USB response. Usually the CPU will simply resend the IN packet by reloading the HXFR
register.