CLKTCD12 User Manual
1
© Masterclock
®
, Inc 2006-2007.
Rev 1.2.0 May ‘07
http://www.masterclock.com
INTRODUCTION
The CLKTCD12 is a precision analog clock containing a stepper motor drive and
advanced microprocessor controlled electronics to rapidly synchronize the hands on the
face of the clock to an accurate time code reference.
The clock has a built-in time code reader that can automatically detect forward running
longitudinal/linear SMPTE 24, 25, & 30 fps (frames per second) NDF (non-drop frame),
and IRIG-B (1 KHz modulated as well as un-modulated/pulse width modulated/DC level
shifted) time code formats.
SMPTE decoding supports 30 fps, 25 fps and 24 fps, NDF (non-drop frame). IRIG-B decoding supports the 1kHz
modulated format (B1) and the unmodulated format (B0).
SMPTE
Defined by the Society of Motion Picture and Television Engineers. It is available in frame rates of 30, 25,
and 24 frames second. The CLKTCD time code clock display supports all three formats.
*
All formats of
SMPTE time code decoded by the CLKTCD use the full date information in the user bits as defined by
Leitch Inc.
•
The CLKTCD, does not support decoding of SMPTE drop-frame time code. Masterclock, Inc.
does not provide products with, or support for, drop-frame capability.
IRIG-B
Defined by the Range Commanders Council, U.S. Army White Sands Missile Range. The format is
used by military, government, power industry, and many other commercial and industrial
applications. The CLKTCD decodes IRIG-B in both a 1kHz modulated (IRIG-B1) and unmodulated
(a.k.a pulse-width coded/DC level shifted) (IRIG-B0) format. All formats of IRIG-B time code
decoded by the CLKTCD use the time of year information BCD (binary coded decimal). All formats
of IRIG-B time code decoded by the CLKTCD also use the extended year/date and time zone
information in the control functions (CF) as defined by the IEEE 1344 specification. SBS (Straight
Binary Seconds) information is not decoded. Manchester format/encoding is not supported.
The CLKTCD12 can be configured for worldwide time zone offset and automatic
Daylight Saving Time (DST) adjustment and allows for reliable, accurate, and
maintenance free operation. Utilization of the automatic DST feature requires that the
clock be enabled to accept the time code date encoding using either the DIP switches (TC
control) or via the USB software configuration utility; and the time code source must
provide date encoding in the control bits/fields to the Masterclock/Leitch date encoding
standard for SMPTE or the IEEE-1344 year encoding for IRIG-B.
DST supported
TIME CODE
FORMATS
Masterclock/Leitch
Date Encoding
IEEE - 1344
Year Encoding
SMPTE – 30 fps
•
SMPTE – 25 fps (EBU)
•
SMPTE – 24 fps (FILM)
•
IRIG-B* pulse width modulated
•
I
N
P
U
T
S
IRIG-B(1)* amplitude modulated
•
Содержание CLKTCD12
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