25
11. BLOCK DIAGRAM
1. Overall Block Diagram
M
M
DISC
SPINDLE
MOT
OR
LOADING
MOT
OR
DECK M ECHANI SM
CD:
A,B, E, F
DVD: A,B,C,D,
DVD; RF
CD:
A,B, E, F
DVD: A,B,C,D,
DVD; RF
PICK
UP
IC205
DRAM
16bit
4M
IC201
HY25D801C
CD / DVD DSP
IC501
P
ANTERA
-
II
Plus
IC901
Upd78032
FROM
FL
DISPLA
Y
KEY
Input
REMOCON
RECEIVER
5
MHz
X-
T
A
L
Cb
IC301
XC9572VL
CPLD
I/O POR
T
72
IC304
SDRAM
16/32BIT
64M
IC305
93C56
EEPROM
IC2M1
KA3032
MOT
OR
DRIVER
IC2A1
T
A33P3721
RF
ICDA
T
A
[00:15]
ICADD
[0:8]
LOADING
FOCUS,TRACKING,SLED
SPINDLE
MIRR,TZC,PI,TE
FE,DFECT_IN
RFO
SCLK,SDA
T
A
SCOR,SQCK,SQSO
XLAT , E_STI , E_ENB , E_DR
RF_XLA
T
, LDON
IC401
PCM1716
DAC
XIO1
,XIO2
,XIO10
F
_CLK
F_OUT
PCMCLK
SPINDLE_FG
MSDA
T
O
MDP1
FOK
DEFECT
DSP_SENSE
LOCK
E_SOUT
ZISENB
/XRST
DAC_RST
16 : 9 , PAL_SW , AUTO_SW , MIC_ON
Y_SEL
/A_MUTE
/DAC_CS1
/DAC_CS2
V_MUTE
DAC_CLK
DAC_OUT
ADCCLK
ACT_MUTE , LOAD_OPEN , LOAD_CLOSE
MIRR
AD[ 00 : 19 ]
PSENB
FLD
/FLD_CS
FLD_CLK
FLD_OUT
/FLD_CS
COMM_CLK
COMM_OUT
CPLD
EE_CS , EE_CLK , EE _OUT
F_IN
IC306
FLASH
ROM
F_IN
/MRESET
74573
/FLASH_CS , /RD
PWEO
LA0
LA1
LA2
LA3
ALE
AD[ 04 : 19 ]
LADD
[04:19]
MD[00:31]
MCLK2
CKE
MA[00:10]
MA12,13
/CS0
/RAS
/CAS
/WE
DQM0`3
REQP
SDCLKI , PSYNC
DVD[1:7]
DSP_INT
SENSE
/DSP_CS
LRCK
DAC-CS
AOUT3
L
Com
pos
ite
FIL
TER
Y
Cr
SW602
V
ideo SW
CVBS/Cr/R , C/Cb/,
Y/G
Y
C
L/R
-VF
AC 240V
,
60Hz
POWER
BOARD
-VF
-24
V
A
+8
V
+5.2
V
A
+5
V_D
+5
V_A
+12
V
A
+3.3
V_M
AD[0:7]
LADD4~5 , LA0~3
AD[ 00 : 15 ]
MDP
,FDO,TDO,FMO,MON
OPEN_SW
CLOSE_SW
LIMIT_SW
CPLD
SBADD ,
27
MHz
X-
T
A
L
33.8688
MHz
X-
T
A
L
+3.3
V
POWER_CTL
/SRST
R
AMP
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