LSI L64777, Техническое руководство

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4-6 Register Descriptions
IQ_EX I and Q Channel Exchange R/W 5
When this bit is 1, the L64777 exchanges the I and Q
channels at the Nyquist filter input. When this bit is 0, the
L64777 leaves the data stream unchanged. The reset
value is 0.
SCR_OFF Scrambler Off R/W 3
When this bit is 1, the L64777 stops the scrambler and
delays the data in this module by three clock cycles.
When this bit is 0, the scrambler runs normally. The reset
value is 0.
RS_OFF Reed-Solomon Off R/W 2
When this bit is 1, the L64777 stops the Reed Solomon
(RS) encoder and delays the data in this module by two
clock cycles. When this bit is 0, the L64777 runs the RS
encoder normally. The reset value is 0.
INT_OFF Interleaver Off R/W 1
When this bit is 1, the L64777 stops the interleaver and
delays the data in this module by three clock cycles.
When this bit is 0, the L64777 runs the interleaver in
DVB-compliant mode. The reset value is 0.
4.1.5 Register 4
SYNC_LENGTH
Sync Block Length R/W [7:0]
This register specifies the distance between consecutive
SYNC_BYTE values. Legal register values range from 32
to 255 for sync block length. The reset value is
0b1011 1011.
4.1.6 Register 5
SYNC_BYTE Sync Reference Pattern R/W [7:0]
This register specifies the sync reference pattern. The
reset value is 0b0100 0111.
7 6 5 4 3 2 1 0
SYNC_LENGTH
7 6 5 4 3 2 1 0
SYNC_BYTE