LTM9004
21
9004fa
For more information
www.linear.com/LTM9004
Output Clock
The ADC has a delayed version of the CLKQ input available
as a digital output, CLKOUT. The falling edge of the CLKOUT
pin can be used to latch the digital output data. CLKOUT
is disabled when channel Q is in sleep or nap mode.
Output Driver Power
Separate output power and ground pins allow the output
drivers to be isolated from the analog circuitry. The power
supply for the digital output buffers, OV
DD
, should be tied
to the same supply that powers the logic being driven. For
example, if the converter drives a DSP powered by a 1.8V
supply, then OV
DD
should be tied to that same 1.8V supply.
OV
DD
can be powered with any voltage from 500mV up
to the V
DD
of the part. OGND can be powered with any
volt-age from GND up to 1V and must be less than OV
DD
.
The logic outputs will swing between OGND and OV
DD
.
Output Enable
The outputs may be disabled with the output enable pin,
OE
.
OE
high disables all data outputs including OF. The
data access and bus relinquish times are too slow to
allow the outputs to be enabled and disabled during full
speed operation. The output Hi-Z state is intended for use
during long periods of inactivity. Channels I and Q have
independent output enable pins (
OEI
,
OEQ
.)
Digital Output Multiplexer
The digital outputs of the ADC can be multiplexed onto a
single data bus. The MUX pin is a digital input that swaps
the two data busses. If MUX is high, I-channel comes out
on DI0 to DI13; Q-channel comes out on DQ0 to DQ13. If
MUX is low, the output busses are swapped and I-channel
comes out on DQ0 to DQ13; Q-channel comes out on DI0
to DI13. To multiplex both channels onto a single output
bus, connect MUX, CLKI and CLKQ together (see the Tim-
ing Diagrams for the multiplexed mode.) The multiplexed
data is available on either data bus – the unused data bus
can be disabled with its
OE
pin.
applicaTions inForMaTion
Design Example – UMTS Uplink FDD System
The LTM9004 can be used with an RF front end to build a
complete UMTS band uplink receiver. An RF front end will
consist of a diplexer, along with one or more LNAs and
bandpass filters. Here is an example of typical performance
for such a frontend:
Rx frequency range: 1920
to 1980 MHz
RF gain: 15dB maximum
AGC range: 20dB
Noise figure:
1.6dB
IIP2: 50dBm
IIP3: 0dBm
P1dB: –9.5dBm
Rejection at 20MHz: 2dB
Rejection at Tx band: 95dB
Minimum performance of the receiver is detailed in the 3GPP
TS25.104 V7.4.0 specification. We will use the Medium Area
Basestation in Operating Band I for this example.
Sensitivity is a primary consideration for the receiver;
the requirement is ≤–111dBm, for an input SNR of
–19.8dB/5MHz. That means the effective noise floor at
the receiver input must be ≤–158.2dBm/Hz. Given the
effective noise contribution of the RF frontend, the maxi-
mum allowable noise due to the LTM9004 must then be
–142.2dBm/Hz. Typical input noise for the LTM9004 is
–148.3dBm/Hz, which translates to a calculated system
sensitivity of –116.7dBm.
Typically such a receiver enjoys the benefits of some DSP
filtering of the digitized signal after the ADC. In this case
assume the DSP filter is a 64 tap RRC lowpass with alpha
equal to 0.22. To operate in the presence of co-channel in-
terfering signals, the receiver must have sufficient dynamic
range at maximum sensitivity. The UMTS specification
calls for a maximum co-channel interferer of –73dBm.
Note the input level for –1dBFS within the IF passband of
the LTM9004 is –15.1dBm for a modulated signal with a
10dB crest factor. The tone interferer amounts to a peak
digitized signal level of –42.6dBFS.
