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LTM9004

2

9004fa

For more information 

www.linear.com/LTM9004

pin conFiguraTion

absoluTe MaxiMuM raTings

Supply Voltage (V

CC1

, V

CC2

) ..................... –0.3V to 5.5V

Supply Voltage (V

CC3

, LTM9004-AA, 

LTM9004-AB) ........................................... –0.3V to 5.5V

Supply Voltage (V

CC3

, LTM9004-AC, 

LTM9004-AD) ........................................... –0.3V to 3.5V

Supply Voltage (V

DD

, OV

DD

) ..................... –0.3V to 4.0V

Digital Output Ground Voltage (OGND) ........ –0.3V to 1V

LO Input Power ....................................................10dBm

RF Input Power ....................................................20dBm

RF Input DC Voltage ............................................... ±0.1V

LO Input DC Voltage ............................................... ±0.1V

x_ADJ Input Voltage ........................–0.3V to V

CC1

, V

CC2

SENSE Input Voltage .................................. –0.3V to V

DD

Digital Input Voltage  

(MIXENABLE) ............................. –0.3V to (V

CC1 

+ 0.3V)

Digital Input Voltage  

(AMP1ENABLE)........................... –0.3V to (V

CC2 

+ 0.3V)

Digital Input Voltage  

(AMP2ENABLE) .......................... –0.3V to (V

CC3 

+ 0.3V) 

Digital Input Voltage (except MIXENABLE and 

AMPxENABLE) ............................. –0.3V to (V

DD 

+ 0.3V) 

Digital Output Voltage ................ –0.3V to (OV

DD 

+ 0.3V)

Operating Temperature Range

  LTM9004C ............................................... 0°C to 70°C

  LTM9004I ............................................–40°C to 85°C

Storage Temperature Range .................. –65°C to 125°C

(Notes 1, 2)

orDer inForMaTion

LGA PACKAGE 

204-LEAD (22mm × 15mm × 2.91mm)

T

JMAX

 = 125°C, 

θ

JA

 = 18.2°C/W, 

θ

JCtop

 = 9.9°C/W, 

θ

JCbottom

 = 6.9°C/W, 

θ

JB

 = 7.1°C/W, VALUES DETERMINED PER JEDEC 51-9, 51-12, WEIGHT = 1.9g

1

2

3

4

5

6

7

8

10

9

11

12

13

14

15

16

17

L

K

J

H

G

F

E

D

C

B

M

A

LEAD FREE FINISH

TRAY

PART MARKING*

PACKAGE DESCRIPTION

TEMPERATURE RANGE

LTM9004CV-AA#PBF

LTM9004CV-AA#PBF

LTM9004V AA

204-Lead (15mm 

×

 22mm 

× 

2.91mm) LGA

0°C to 70°C

LTM9004IV-AA#PBF

LTM9004IV-AA#PBF

LTM9004V AA

204-Lead (15mm 

×

 22mm 

× 

2.91mm) LGA

–40°C to 85°C

LTM9004CV-AB#PBF

LTM9004CV-AB#PBF

LTM9004V AB

204-Lead (15mm 

×

 22mm 

× 

2.91mm) LGA

0°C to 70°C

LTM9004IV-AB#PBF

LTM9004IV-AB#PBF

LTM9004V AB

204-Lead (15mm 

×

 22mm 

× 

2.91mm) LGA

–40°C to 85°C

LTM9004CV-AC#PBF

LTM9004CV-AC#PBF

LTM9004V AC

204-Lead (15mm 

×

 22mm 

× 

2.91mm) LGA

0°C to 70°C

LTM9004IV-AC#PBF

LTM9004IV-AC#PBF

LTM9004V AC

204-Lead (15mm 

×

 22mm 

× 

2.91mm) LGA

–40°C to 85°C

LTM9004CV-AD#PBF

LTM9004CV-AD#PBF

LTM9004V AD

204-Lead (15mm 

×

 22mm 

× 

2.91mm) LGA

0°C to 70°C

LTM9004IV-AD#PBF

LTM9004IV-AD#PBF

LTM9004V AD

204-Lead (15mm 

×

 22mm 

× 

2.91mm) LGA

–40°C to 85°C

Consult LTC Marketing for parts specified with wider operating temperature ranges.  *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: 

http://www.linear.com/leadfree/

  

This product is only offered in trays. For more information go to: 

http://www.linear.com/packaging/

CAUTION: This part is sensitive to electrostatic discharge 

(ESD). It is very important that proper ESD precautions 

be observed when handling the RF and LO inputs of the 

LTM9004.

Содержание LTM9004

Страница 1: ...allows the outputs to drive 0 5V to 3 3V logic An optional multiplexer allows both channels to share a digital output bus An optional clock duty cycle stabilizer allows high performance at full speed...

Страница 2: ...H G F E D C B M A LEAD FREE FINISH TRAY PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTM9004CV AA PBF LTM9004CV AA PBF LTM9004V AA 204 Lead 15mm 22mm 2 91mm LGA 0 C to 70 C LTM9004IV AA PBF LTM9...

Страница 3: ...z 60 8 64 6 dBm dBm RF to LO Isolation RF 900MHz RF 1900MHz 59 7 57 1 dB dB Maximum DC Offset Voltage No RF Note 5 35 mV DC Offset Variation 40 C to 85 C 210 V C Gain Flatness DC to 1 92MHz LTM9004 AA...

Страница 4: ...91 dB LTM9004 AC RF 1952 5MHz LO 1950MHz l 70 89 dB LTM9004 AD RF 1955MHz LO 1950MHz l 70 89 dB S N D Signal to Noise Plus Distortion Ratio at 1dBFS LTM9004 AA RF 1950 5MHz LO 1950MHz l 51 5 58 5 dB L...

Страница 5: ...ce VCC2 5V VAMP1ENABLE 0V to 0 5V 25 70 k Turn On Time 200 ns Turn Off Time 50 ns Second Amplifier Logic Input AMP2ENABLE LTM9004 AA LTM9004 AB VIH High Level Input Voltage VCC3 5V l VCC3 0 6 V VIL Lo...

Страница 6: ...t VOUT 0V 50 mA ISINK Output Sink Current VOUT 3V 50 mA VOH High Level Output Voltage IO 10 A IO 200 A l 2 7 2 995 2 99 V V VOL Low Level Output Voltage IO 10 A IO 1 6mA l 0 005 0 09 0 4 V V OVDD 2 5V...

Страница 7: ...ITIONS MIN TYP MAX UNITS fS Sampling Frequency l 1 125 MHz tL CLK Low Time Duty Cycle Stabilizer Off Note 6 Duty Cycle Stabilizer Off Note 6 l l 3 8 3 4 4 500 500 ns ns tH CLK High Time Duty Cycle Sta...

Страница 8: ...tIPQ tH tL CLKOUT tC DQ0 DQ13 I 1 I 5 Q 5 I 4 Q 4 I 3 Q 3 I 2 Q 2 I 1 Q 5 I 5 Q 4 I 4 Q 3 I 3 Q 2 I 2 Q 1 I 2 I 4 I 3 I DEMODULATOR ANALOG OUTPUT I tIPI Multiplexed Digital Output Bus Timing Timing Di...

Страница 9: ...00 120 4 8 16 12 0 110 FREQUENCY MHz 0 AMPLITUDE dBFS 90 80 70 60 50 40 30 20 10 20 9004 G02 100 120 4 8 16 12 0 110 BASEBAND FREQUENCY MHz 0 dB 45 40 35 30 25 20 15 10 5 20 18 9004 G02a 50 60 2 4 6 1...

Страница 10: ...IN 1955 0MHz 1dBFS SENSE VDD LTM9004 AD Baseband Frequency Response FREQUENCY MHz 0 AMPLITUDE dBFS 90 80 70 60 50 40 30 20 10 60 9004 G08 100 120 10 20 40 50 30 0 110 IF FREQUENCY MHz 0 AMPLITUDE dB 4...

Страница 11: ...Clock Input The input sample starts on the positive edge Tie CLKQ and CLKI together I _ADJ PinB1 DCOffsetAdjustPinforI Channel Line Source or sink current through this pin to trim DC offset I _ADJ Pi...

Страница 12: ...to ADCSHDNI pin function Digital Outputs CLKOUT Pin E12 ADC Data Ready Clock Output Latch data on the falling edge of CLKOUT CLKOUT is derived from CLKQ Tie CLKQ to CLKI for simultaneous operation DI0...

Страница 13: ...E 9004 BD ADC LPF OUTPUT DRIVERS LPF LPF RF LO ADJ ADJ SENSE REF BUFFER DIFF REF AMP D13 D0 AMP2 ENABLE VCC3 2ND AMP AMP1 ENABLE VCC2 1ST AMP 1 5V REFERENCE RANGE SELECT For more information www linea...

Страница 14: ...because their frequency response extends to DC Thefollowingsectionsdescribeinfurtherdetailtheopera tion of each section The Module technology allows the LTM9004 to be customized and this is described...

Страница 15: ...fferent cutoff frequencies within the range of the amplifiers LTM9004 AA for example implements a lowpass filter designed for 1 92MHz ADC INPUT NETWORK The passive network between the second amplifier...

Страница 16: ...ce FREQUENCY MHz MAGNITUDE PHASE R X 500 0 78 139 7 16 1 10 7 600 0 69 166 6 10 1 3 8 700 0 60 163 7 14 0 3 8 800 0 52 132 6 25 8 6 9 900 0 48 102 7 41 9 3 4 1000 0 45 77 4 58 8 4 3 1100 0 42 56 6 74...

Страница 17: ...5 2 7 6 3000 0 58 124 9 27 9 7 9 ADC Reference The internal voltage reference can be configured for two pin selectable ADC input ranges Tying the SENSE pin to VDD selects the default range tying the S...

Страница 18: ...ntrolled by ADCSHDNI and OEI and Q Channel is controlled by ADCSHDNQ and OEQ The nap sleep and output enable modes of the two channels are completely independent so it is possible to have one channel...

Страница 19: ...requency noise that may be induced into the clock line by neighboring digital signals as well as a damping mechanism for reflections Maximum and Minimum Conversion Rates The maximum conversion rate fo...

Страница 20: ...ppear as 50 to external circuitry and may eliminate the need for external damping resistors Aswithallhighspeed highresolutionconvertersthedigi tal output loading can affect the performance The digital...

Страница 21: ...bus connect MUX CLKI and CLKQ together see the Tim ing Diagrams for the multiplexed mode The multiplexed data is available on either data bus the unused data bus can be disabled with its OE pin APPLI...

Страница 22: ...5dB Leakage appearing at the LTM9004 input is then 42dBm offset from the receive signal by at least 130MHz The equivalent digitized level is only 76 6dBFS peak so there is no desensitization One chall...

Страница 23: ...of sufficient area with as many vias as possible Recommended Layout The high integration of the LTM9004 makes the PCB board layout simple However to optimize its electrical and thermal performance so...

Страница 24: ...LTM9004 24 9004fa For more information www linear com LTM9004 APPLICATIONS INFORMATION Figure 11 Layer 1 Figure 12 Layer 2...

Страница 25: ...LTM9004 25 9004fa For more information www linear com LTM9004 APPLICATIONS INFORMATION Figure 13 Layer 3 Figure 14 Layer 4...

Страница 26: ...66 0 46 2 55 0 15 0 10 0 05 NOTES DIMENSIONS TOTAL NUMBER OF LGA PADS 204 NOTES 1 DIMENSIONING AND TOLERANCING PER ASME Y14 5M 1994 2 ALL DIMENSIONS ARE IN MILLIMETERS LAND DESIGNATION PER JESD MO 222...

Страница 27: ...6 Revision History Information furnished by Linear Technology Corporation is believed to be accurate and reliable However noresponsibilityisassumedforitsuse LinearTechnologyCorporationmakesnorepresent...

Страница 28: ...QFN LT5575 800MHz to 2 7GHz High Linearity Direct Conversion Quadrature Demodulator 60dBm IIP2 at 1 9GHz NF 12 7dB Low DC Offsets LTC6404 1 LTC6404 2 600MHz Low Noise AC Precision Fully Differential I...

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