LTC4110
26
4110fb
The three I/O outputs, GPIO1, GPIO2 and GPIO3 are digital
I/O pins with two modes of operation.
1) General Purpose I/O
2) Status Reporting
A host can set the mode of each I/O pin with each I/O pin’s
setting independent of the others such that any combination
of status reporting or bit I/O can be implemented. Only a
UVLO or a SHDN event will change the GPIO_n_EN bits
back to default values. If you enable a GPIO pin to report
status output, it overrides the GPIO_n_OUT setting. In
addition, the LTC4110 supports a special power up mode
of status reporting on all 3 IO pins for standalone applica-
tions where it is assumed “no host” exists. This power up
status mode is enabled if the SELA pin is set to 0.5 • V
REF
voltage as developed from V
REF
pin resistor divider. This
mode does not actually disable the SMBus in any way and
if a host does exist in this power up mode, the host can
reprogram the I/O settings at any time.
All GPIO pins operate as digital inputs at all times regard-
less of the pin settings with pin state reported on the
GPIO_n_IN bits in the BBuStatus() register. However to
actually read digital input data from an external device, you
must disable the GPIO_n_EN bit. Otherwise the input will
simply refl ect the output state assuming external powered
pull-ups exist.
There are a total of 5 status signals possible. CHGb, C/xb,
BKUP-FLTb, CHG_FLTb, and CAL_COMPLETEb. Each of
these signals is asserted low on the output when they
are true. CHGb is an asserted low signal when either
CHG_STATE_0 or CHG_STATE_1 is set to one. C/xb is
asserted low signal when C/x state in the charge cycle is
reached. This status signal is only available if the TYPE pin
is set to SLA mode and replaces the CHGb status output.
BKUP_FLTb is asserted low when the BKUP_FLT bit is set
to one in the BBuStatus() register. BKUP_FLT is a sticky bit
that is designed to be cleared primarily through the setting
of the BUFLT_RST bit in the BBuControl() register. The value
of this bit does not inhibit charging or calibration functions.
CHG_FLTb is asserted low when the CHG_FLT bit is set to
one in the BBuStatus() register. CAL_COMPLETEb bit is
asserted low when the conditions of successful calibra-
tion cycle are met. CAL_COMPLETEb status output can
be used as an interrupt to a host for the purpose of help
implementing a simple gas gauge function or capacity
verifi cation function with a standard battery. However, if the
LTC4110 is set up in no host mode, CAL_COMPLETEb as a
status signal is not considered usable since it is assumed
there is no host to enable calibration mode. Therefore the
CHG_FLTb signal is substituted for CAL_COMPLETEb as
the status output signal. Table 5 describes the specifi c
modes and status signal options of each GPIO pin.
OPERATION
Table 5b. GPIO1 Power Up Mode (SELA = 0.5 • V
REF
)
FORCED BIT SETTINGS
TYPE = SLA
GPIO_1 MODE
DATA
NOTE
GPIO_1_EN
GPIO_1_OUT
GPIO_1_CHG
1
X
1
0
Status Output
CHGb
With Pull-Up
1
X
1
1
Status Output
C/xb
With Pull-Up
Table 5a. GPIO1 Modes
HOST PROGRAMMED BIT SETTINGS
GPIO_1 MODE
DATA
NOTE
GPIO_1_EN
GPIO_1_OUT
GPIO_1_CHG
0
0
0
Digital Input
Input Data
GPIO_1_IN
1
X
1
Status Output
CHGb
With Pull-Up
1
0
0
Digital Output
0
With Pull-Up
1
1
0
Digital Output
1
With Pull-Up