- 27 -
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
3. Technical Brief
3.6.2 Memory support (and LCD interface)
The QSC62x0 device has two external bus interface (EBI) ports: EBI1 and EBI2.
EBI1 supports high-speed synchronous dynamic devices. Its memory controller supports the new
mobile DDR SDRAM memories with its higher bandwidth and ability to run at high clock
frequencies. This interface supports the high-bandwidth, high-density, and low-latency
requirements of the QSC’s advanced on-chip capabilities such as the ARM9 processor, highperformance
graphics, and video applications.
EBI2 is the slower speed interface intended to support memory devices such as NAND flash and
asynchronous SRAM, peripheral devices such as LCDs, and the UBM receiver for multicast or
broadcast reception (QSC6270 only). In addition, EBI2 is required to support a synchronous-burst
AAD NOR flash to enable a NOR/DDR SDRAM memory configuration because the simultaneous
mode (NOR, SDRAM) is not supported on the EBI1 bus.
The ARM926EJ-S microprocessor is a cached processor and all its accesses to external memory
use burst techniques of four or eight 32-bit words when the memory region is declared to be
cacheable/bufferable. To take advantage of this QSC higher performance feature, data from
memories must satisfy the requirements for these burst accesses.
QSC6240
DDR
SDRAM
512Mbit
DATA[0:15]
ADDRESS[0:31]
EBI1
EBI2
External Memory (MICRO-
SD card)
NAND E
2
PR
1Gbit
SDRAM_CKE
SDRAM_CLK_P
SDRAM_CLK_N
SDRAM_CS_N
SDRAM_WE_N
SDRAM_RAS_N
SDRAM_CAS_N
SDRAM_DQM[0:1]
SDRAM_DQS[0:1]
EBI2_CS1_N
EBI2_WE_N
EB2_OE_N
EBI2_ALE
EBI2_CLE
RESOUT_N
NAND_READY
EBI2_DATA[0:15]
MICROSD_CLK
MICROSD_DETECT
MICROSD_DATA[0:3]
MICROSD_CMD
USIM
USIM_RST
USIM_CLK
USIM_DATA
Figure 2.1.2.1 The memory control blocks of GU280
QSC6240
DDR
SDRAM
512Mbit
DATA[0:15]
ADDRESS[0:31]
EBI1
EBI2
External Memory (MICRO-
SD card)
NAND E
2
PROM
1Gbit
SDRAM_CKE
SDRAM_CLK_P
SDRAM_CLK_N
SDRAM_CS_N
SDRAM_WE_N
SDRAM_RAS_N
SDRAM_CAS_N
SDRAM_DQM[0:1]
SDRAM_DQS[0:1]
EBI2_CS1_N
EBI2_WE_N
EB2_OE_N
EBI2_ALE
EBI2_CLE
RESOUT_N
NAND_READY
EBI2_DATA[0:15]
MICROSD_CLK
MICROSD_DETECT
MICROSD_DATA[0:3]
MICROSD_CMD
USIM
USIM_RST
USIM_CLK
USIM_DATA