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7. CIRCUIT DIAGRAM
LGE Internal Use Only
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
K7.
4
10
3
R
VREG_MSMP_2.6V
K7.
4
20
3
R
K
0
0
1
3
0
3
R
s
m
h
o
K
1
9
4
0
3
R
2
1
QSC6240_DATA,QSC6240_POWER
U201
8
C
A
1
C
A
0
1
B
A
3
2
T
6
1
T
5
1
T
8
1
R
6
1
R
5
1
R
3
1
R
2
1
R
1
1
R
0
1
R
9
R
8
R
6
R
6
1
P
5
1
P
4
1
P
3
1
P
2
1
P
1
1
P
0
1
P
9
P
8
P
6
1
N
5
1
N
4
1
N
3
1
N
2
1
N
1
1
N
0
1
N
9
N
8
N
3
2
M
2
2
M
9
1
M
6
1
M
5
1
M
4
1
M
3
1
M
2
1
M
1
1
M
0
1
M
9
M
8
M
1
2
L
9
1
L
8
1
L
6
1
L
5
1
L
4
1
L
9
L
8
L
6
1
K
5
1
K
4
1
K
9
K
8
K
1
2
J
8
1
J
4
1
J
3
1
J
2
1
J
1
1
J
0
1
J
9
J
8
J
1
2
H
4
1
H
3
1
H
1
1
H
9
H
2
2
G
8
1
G
2
2
F
1
2
F
9
1
F
8
1
F
7
1
F
6
1
F
5
1
F
6
F
3
2
E
2
2
E
1
2
E
9
1
E
7
1
E
6
1
E
2
2
C
1
2
C
9
1
B
A2
C15
AB3
E2
AA4
E5
AA5
AB5
C6
AA6
F1
AB4
F10
F2
F11
E6
AA2
Y3
C7
AA1
F5
Y2
B6
Y1
W3
L5
W2
K5
V2
V1
H5
W1
G5
A8
J6
B8
J5
E9
H6
C8
G6
P5
E14
F3
C11
E11
J2
E12
P2
B11
E13
J1
C12
P1
B12
F12
E1
C13
D1
B13
D2
F13
C1
B14
B1
C14
C2
A11
B3
A10
E3
B10
D3
H12
B4
B9
A3
C9
C4
H10
A4
AC4
C5
AB6
B5
AC5
A5
B7
A7
T2
E7
T1
F7
R2
F8
R1
E8
N2
A13
N1
F14
M2
A14
M1
B15
L2
E15
L1
B17
K2
A17
K1
B16
H2
A16
H1
C16
G1
C17
G2
T14
V7
U3
W6
T3
W7
T6
W8
P3
W9
T5
V8
P6
AA7
R5
AB8
N6
AA3
H3
AB2
AB1
L6
AC3
M3
K3
N5
M5
M6
K6
8
1
P
9
1
T
1
2
T
1
2
R
9
1
P
9
1
N
1
2
M
3
2
P
3
2
N
2
2
P
2
2
N
1
2
N
1
2
P
2
2
R
0
1
C
5
U
3
V
6
C
A
7
C
A
8
A
A
9
A
A
9
F
0
1
E
6
V
6
U
5
W
5
V
1
1
T
2
C
A
0
1
T
9
T
8
T
3
_
E
D
O
M
2
_
E
D
O
M
1
_
E
D
O
M
0
_
E
D
O
M
C
N
D
I
D
T
S
M
T
K
C
T
N
_
T
S
R
T
D
X
R
_
1
T
R
A
U
N
_
T
U
O
S
E
R
T
X
E
_
F
E
R
_
R
DI
_
B
S
U
P
D
_
B
S
U
M
D
_
B
S
U
O
D
T
K
C
T
R
D
X
T
_
1
T
R
A
U
1
NI
A
K
H
P
1
CI
M
N
1
CI
M
P
2
CI
M
N
2
CI
M
P
_
L
_
NI
_
E
NI
L
N
_
R
_
NI
_
E
NI
L
P
M
O
C
C
P
O
R
A
E
N
O
R
A
E
P
_
L
_
T
U
O
_
E
NI
L
N
_
R
_
T
U
O
_
E
NI
L
P
_
L
_
T
U
O
_
H
P
H
N
_
R
_
T
U
O
_
H
P
H
EBI1_A_D_31
EBI1_A_D_30
EBI1_A_D_29
EBI1_A_D_28
EBI1_A_D_27
EBI1_A_D_26
GPIO_77
EBI1_A_D_25
GPIO_76
GPIO_75
EBI1_A_D_24
GPIO_74
EBI1_A_D_23
GPIO_73
EBI1_A_D_22
GPIO_72
EBI1_A_D_21
GPIO_71
EBI1_A_D_20
GPIO_70
EBI1_A_D_19
GPIO_69
EBI1_A_D_18
GPIO_68
EBI1_A_D_17
GPIO_67
EBI1_A_D_16
GPIO_66
GPIO_65
EBI1_A_D_15
GPIO_64
EBI1_A_D_14
GPIO_63
EBI1_A_D_13
GPIO_62
EBI1_A_D_12
GPIO_61
EBI1_A_D_11
GPIO_60
EBI1_A_D_10
GPIO_59
EBI1_A_D_9
GPIO_58
EBI1_A_D_8
GPIO_57
EBI1_A_D_7
GPIO_56
EBI1_A_D_6
GPIO_55
EBI1_A_D_5
GPIO_54
EBI1_A_D_4
GPIO_53
EBI1_A_D_3
GPIO_52
EBI1_A_D_2
GPIO_51
EBI1_A_D_1
GPIO_50
EBI1_A_D_0
GPIO_49
GPIO_48
EBI2_A_D_15
GPIO_47
EBI2_A_D_14
GPIO_46
EBI2_A_D_13
GPIO_45
EBI2_A_D_12
GPIO_44
EBI2_A_D_11
GPIO_43
EBI2_A_D_10
GPIO_42
EBI2_A_D_9
GPIO_41
EBI2_A_D_8
GPIO_40
EBI2_A_D_7
GPIO_39
EBI2_A_D_6
GPIO_38
EBI2_A_D_5
GPIO_37
EBI2_A_D_4
GPIO_36
EBI2_A_D_3
GPIO_35
EBI2_A_D_2
GPIO_34
EBI2_A_D_1
GPIO_33
EBI2_A_D_0
GPIO_32
GPIO_31
EBI1_DQS_0
GPIO_30
EBI1_DQS_1
GPIO_29
GPIO_28
EBI1_DQM_0
GPIO_27
EIB1_DQM_1
GPIO_26
GPIO_25
EBI1_CKE_0
GPIO_24
EBI1_CKE_1
GPIO_23
GPIO_22
EBI1_CS0_N
GPIO_21
EBI1_CS1_N
GPIO_20
EBI1_ADV_N
GPIO_19
EBI1_OE_N
GPIO_18
EBI1_WE_N
GPIO_17
GPIO_16
EBI1_M_CLK
GPIO_15
EBI1_M_CLK_N
GPIO_14
GPIO_13
LCD_RS
GPIO_12
LCD_EN
GPIO_11
LCD_CS_N
GPIO_10
GPIO_9
EBI2_WE_N
GPIO_8
EBI2_OE_N
GPIO_7
GPIO_6
EBI2_UB_N
GPIO_5
EBI2_LB_N
GPIO_4
GPIO_3
EBI2_CS1_N
GPIO_2
EBI2_CS0_N
GPIO_1
GPIO_0
EBI2_M_CLK
1
_
F
R
_
A
_
D
N
G
2
_
F
R
_
A
_
D
N
G
3
_
F
R
_
A
_
D
N
G
4
_
F
R
_
A
_
D
N
G
5
_
F
R
_
A
_
D
N
G
6
_
F
R
_
A
_
D
N
G
7
_
F
R
_
A
_
D
N
G
8
_
F
R
_
A
_
D
N
G
9
_
F
R
_
A
_
D
N
G
1
_
GI
D
_
D
N
G
2
_
GI
D
_
D
N
G
0
1
_
F
R
_
A
_
D
N
G
1
1
_
F
R
_
A
_
D
N
G
2
1
_
F
R
_
A
_
D
N
G
3
1
_
F
R
_
A
_
D
N
G
4
1
_
F
R
_
A
_
D
N
G
5
1
_
F
R
_
A
_
D
N
G
6
1
_
F
R
_
A
_
D
N
G
7
1
_
F
R
_
A
_
D
N
G
3
_
GI
D
_
D
N
G
4
_
GI
D
_
D
N
G
5
_
GI
D
_
D
N
G
8
1
_
F
R
_
A
_
D
N
G
9
1
_
F
R
_
A
_
D
N
G
6
_
GI
D
_
D
N
G
7
_
GI
D
_
D
N
G
8
_
GI
D
_
D
N
G
9
_
GI
D
_
D
N
G
0
1
_
GI
D
_
D
N
G
1
1
_
GI
D
_
D
N
G
0
2
_
F
R
_
A
_
D
N
G
1
2
_
F
R
_
A
_
D
N
G
2
2
_
F
R
_
A
_
D
N
G
2
1
_
GI
D
_
D
N
G
3
1
_
GI
D
_
D
N
G
3
2
_
F
R
_
A
_
D
N
G
4
2
_
F
R
_
A
_
D
N
G
5
2
_
F
R
_
A
_
D
N
G
4
1
_
GI
D
_
D
N
G
5
1
_
GI
D
_
D
N
G
6
2
_
F
R
_
A
_
D
N
G
7
2
_
F
R
_
A
_
D
N
G
8
2
_
F
R
_
A
_
D
N
G
9
2
_
F
R
_
A
_
D
N
G
0
3
_
F
R
_
A
_
D
N
G
1
3
_
F
R
_
A
_
D
N
G
6
1
_
GI
D
_
D
N
G
7
1
_
GI
D
_
D
N
G
8
1
_
GI
D
_
D
N
G
9
1
_
GI
D
_
D
N
G
0
2
_
GI
D
_
D
N
G
1
2
_
GI
D
_
D
N
G
2
3
_
F
R
_
A
_
D
N
G
3
3
_
F
R
_
A
_
D
N
G
4
3
_
F
R
_
A
_
D
N
G
5
3
_
F
R
_
A
_
D
N
G
6
3
_
F
R
_
A
_
D
N
G
7
3
_
F
R
_
A
_
D
N
G
2
2
_
GI
D
_
D
N
G
3
2
_
GI
D
_
D
N
G
4
2
_
GI
D
_
D
N
G
5
2
_
GI
D
_
D
N
G
6
2
_
GI
D
_
D
N
G
7
2
_
GI
D
_
D
N
G
8
3
_
F
R
_
A
_
D
N
G
9
3
_
F
R
_
A
_
D
N
G
0
4
_
F
R
_
A
_
D
N
G
8
2
_
GI
D
_
D
N
G
9
2
_
GI
D
_
D
N
G
0
3
_
GI
D
_
D
N
G
1
3
_
GI
D
_
D
N
G
2
3
_
GI
D
_
D
N
G
3
3
_
GI
D
_
D
N
G
1
4
_
F
R
_
A
_
D
N
G
2
4
_
F
R
_
A
_
D
N
G
3
4
_
F
R
_
A
_
D
N
G
4
3
_
GI
D
_
D
N
G
5
3
_
GI
D
_
D
N
G
6
3
_
GI
D
_
D
N
G
7
3
_
GI
D
_
D
N
G
8
3
_
GI
D
_
D
N
G
9
3
_
GI
D
_
D
N
G
0
4
_
GI
D
_
D
N
G
1
4
_
GI
D
_
D
N
G
2
4
_
GI
D
_
D
N
G
4
4
_
F
R
_
A
_
D
N
G
3
4
_
GI
D
_
D
N
G
4
4
_
GI
D
_
D
N
G
5
4
_
F
R
_
A
_
D
N
G
V
5
_
D
N
G
D
N
G
_
F
E
R
6
4
_
GI
D
_
D
N
G
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
L
K
J
I
H
G
F
E
D
C
B
A
L
K
J
I
H
G
F
E
D
C
B
A
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
V
6.
2
_
P
M
S
M
_
G
E
R
V
V
2.
2
_
A
F
R
_
G
E
R
V
TP
TP301
R305
18
C301
2p
1
0
3
A
V
R
F
0
7
2
8
1
5
0
S
V
CI
R306
18
7
0
3
R
K
2.
2
TP302
TP
2
0
3
C
n
0
0
1
TP
TP303
UART1
UART_TP
12
11
10
9
8
7
6
5
4
3
2
1
GND
RX
TX
NC1
ON_SW
VBAT
NC2
NC3
NC4
DSR
RTS
CTS
GND
RX
TX
VCHAR
ON_SW
VBAT
PWR
URXD
UTXD
3G
2.5G
100n
C303
K
2.
2
8
0
3
R
K
2.
29
0
3
R
TP
TP304
4
0
3
C
n
0
0
1
V
6.
2
_
P
M
S
M
_
G
E
R
V
0
1
3
R
K
0
0
1
2
1
5
0
3
C
n
0
7
4
6
0
3
C
n
0
0
1
V
8.
1
_
E
M
S
M
_
G
E
R
V
TP
TP305
V
8.
1
_
M
A
C
_
O
D
L
1
1
3
R
K
2.
2
n
0
0
17
0
3
C
K
0
1
2
1
3
R
R
F
0
7
2
8
1
5
0
S
V
CI
2
0
3
A
V
n
0
7
48
0
3
C
3
1
3
R
0
4
0
6
AXT610124
CN301
6
5
7
4
8
3
9
2
10
1
G1
G2
G3
G4
3
0
3
A
V
R
F
0
7
2
8
1
5
0
S
V
CI
DNI
C309
V
8.
1
_
E
M
S
M
_
G
E
R
V
TRK_LO_ADJ
PA_R0
UART1_RX_DATA
A
T
A
D
_
X
R
_
1
T
R
A
U
UART1_TX_DATA
A
T
A
D
_
X
T
_
1
T
R
A
U
UART1_CTS_N
UART1_RFR_N
BT_PWR_ON
BT_PCM_SYNC
BT_PCM_DIN
BT_PCM_DOUT
BT_PCM_CLK
PA_R1
VBATT
MSM_RESIN_N
VBUS
VBUS
PS_HOLD
KPDPWR_N
GND
EBI2_WE_N
LCD_IF[2]
CAM_LDO_EN
LCD_BACKLIGHT_CONT
M
_
R
_
NI
E
NI
L
P
_
L
_
NI
E
NI
L
LCD_IF[1]
SLIDE_DETECT
-
V
C
R
+
V
C
R
EBI2_DATA[0]
EBI2_DATA[1]
EBI2_DATA[10]
EBI2_DATA[11]
EBI2_DATA[12]
EBI2_DATA[13]
EBI2_DATA[14]
EBI2_DATA[15]
EBI2_DATA[2]
EBI2_DATA[3]
EBI2_DATA[4]
EBI2_DATA[5]
EBI2_DATA[6]
EBI2_DATA[7]
EBI2_DATA[8]
EBI2_DATA[9]
EBI2_OE_N
KEY_COL[3]
KEY_ROW[3]
KEY_ROW[2]
KEY_ROW[1]
KEY_ROW[0]
LCD_VSYNC
CAMIF_HSYNC
CAM_RST
CAM_PWDN
CAMIF_DATA[0]
CAMIF_DATA[1]
CAMIF_DATA[2]
CAMIF_DATA[3]
CAMIF_DATA[4]
CAMIF_DATA[5]
CAMIF_DATA[6]
I2C_SDA
I2C_SCL
I2C2_SDA
I2C2_SCL
VGA_CAM_RST
LCD_RST
LCD_MAKER_ID
KEY_COL[4]
LCD_CS_N
LCD_ADS
P
_
E
NI
L
N
_
E
NI
L
VGA_CAM_PWDN
CAMIF_MCLK
CAMIF_DATA[7]
CAMIF_VSYNC
CAMIF_PCLK
P
1
CI
M
KEY_ROW[4]
I2C_SDA_BL
I2C_SCL_BL
ANT_SEL[0]
ANT_SEL[1]
ANT_SEL[2]
ANT_SEL[3]
UART_BT_SEL
UART_BT_SEL
P
2
CI
M
M
D
_
B
S
U
USB_DM
SDRAM_ADV_N
SDRAM_DATA[0]
SDRAM_DATA[1]
SDRAM_DATA[10]
SDRAM_DATA[11]
SDRAM_DATA[12]
SDRAM_DATA[13]
SDRAM_DATA[14]
SDRAM_DATA[15]
SDRAM_ADDR[0]
SDRAM_ADDR[1]
SDRAM_ADDR[2]
SDRAM_ADDR[3]
SDRAM_DATA[2]
SDRAM_ADDR[4]
SDRAM_ADDR[5]
SDRAM_ADDR[6]
SDRAM_ADDR[7]
SDRAM_ADDR[8]
SDRAM_ADDR[9]
SDRAM_ADDR[10]
SDRAM_ADDR[11]
SDRAM_ADDR[12]
SDRAM_DATA[3]
SDRAM_DATA[4]
SDRAM_DATA[5]
SDRAM_DATA[6]
SDRAM_DATA[7]
SDRAM_DATA[8]
SDRAM_DATA[9]
SDRAM_CKE[0]
SDRAM_CS_N[0]
SDRAM_DQM[0]
SDRAM_DQS[0]
SDRAM_DQS[1]
SDRAM_OE_N
SDRAM_WE_N
EBI2_CS1_N
EBI2_ALE_N
EBI2_CLE_N
SDRAM_DQM[1]
MICROSD_DETECT
MICROSD_DATA[0]
MICROSD_DATA[1]
MICROSD_DATA[2]
USW_INT
USIM_RST
USIM_CLK
USIM_DATA
NAND_READY
MICROSD_DATA[3]
MICROSD_CLK
L
_
H
P
H
R
_
H
P
H
P
D
_
B
S
U
USB_DP
JTAG_TRST_N
N
_
T
S
R
T
_
G
A
T
J
JTAG_TMS
S
M
T
_
G
A
T
J
JTAG_TDO
O
D
T
_
G
A
T
J
JTAG_TDI
I
D
T
_
G
A
T
J
JTAG_TCK
K
C
T
_
G
A
T
J
JTAG_RTCK
K
C
T
R
_
G
A
T
J
N
_
T
U
O
S
E
R
SDRAM_CLK_M
SDRAM_CLK_P
SDRAM_ADDR[14]
SDRAM_ADDR[15]
SDRAM_ADDR[13]
GSM_SW_MODE
KEY_COL[0]
KEY_COL[1]
KEY_COL[2]
MICROSD_CMD
SDRAM_DATA[0:15]
SDRAM_ADDR[0:15]
EBI2_DATA[0:15]
0
0
100K : 91K : 1.048V - 1.0
100K : 240K : 1.553V - 1.2
Connect to GND on PCB Array
MODE_3 MODE_2 MODE_1 MODE_0
MODE
( Default Pull-Down)
LCD_DRV_N - SUB_BACKLIGHT
100K : 6.2K : 0.128V - A, G
100K : 470K : 1.814V - 1.3
HKAIN1:PCB_Rev_ADC
MPP3 - KYBD_BACKLIGHT
HKAIN0 - VBATT_TEMP
* MODE_3 : Not connected(internally pulled-down) - Enabled by HW
MPP2 - Null
100K : 62K : 0.842V - F, L
High : BT UART
100K : 47K : 0.703V - D, J
0
100K : 22K : 0.396V - C, I
ADC
1
Native ARM9 JTAG
100K : 13K : 0.253V - B, H
100K : 150K : 1.32V - 1.1
MPP4 - Null
100K : 1.5M : 2.062V - 1.4
MPP1 - VREF_RFA_2.2V (internally)
HKAIN1 - PCB_Rev_ADC
Low : UART Comm
JTAG