7. CIRCUIT DIAGRAM
- 112 -
LGE Internal Use Only
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
CN402 HSBC-3PT25-17N
3
2
4
1
GU073-5P-SD-E1500
CN401
15
13
11
9
7
5
4
3
2
1
14
12
10
8
6
K0
01
61
4
R
33p
C406
K0
01
10
4
R
22p
C409
S401
104042-001
DAT1_2
DUMMY1
DAT0
VSS
CLK
VDD
CMD
CD_DAT3
DUMMY2
DAT2
DETECT_A
DETECT_B
DUMMY3
J401
GCA26A-6S-H16-M-E1500
C11
C10
C12
C9
C7
C3
C6
C2
C5
C1
VCC
GND1
RST
VPP
CLK
IO
GND2
GND5
GND3
GND4
C401
1u
600
HB-1M1005-601JT
FB401
U401
NANDA9R4N4CZBA5E
F5
P9
E5
P7
D6
P5
K6
H10
K7
G2
L7
C9
L6
C5
F6
E6
H2
M3
L3
P8
K3
P4
D7
C7
P6
C6
C8
E3
C4
D5
G3
J11
F3
J10
N3
J9
J8
J7
T12
J6
T11
J5
T10
J4
T3
J3
T2
J2
T1
H11
R12
H9
R11
H8
R10
H7
R3
H6
R2
H5
R1
H4
P12
H3
P11
G10
P3
G9
P2
G6
P1
F9
N2
F2
M2
E9
L2
E2
K10
D3
K9
D2
K8
D1
K5
C12
K4
C11
K2
C3
C2
D11
C1
E11
B12
F11
B11
G11
B10
K11
B3
L11
B2
M11
B1
N11
A12
C10
A11
D10
A10
E10
A3
F10
A2
L10
A1
M10
N10
N9
P10
M9
L9
E7
N8
F7
M8
G5
L8
G7
N7
D9
M7
D8
N6
E8
M6
F8
N5
G8
M5
G4
L5
F4
N4
E4
M4
D4
L4
DQ0
A0
DQ1
A1
DQ2
A2
DQ3
A3
DQ4
A4
DQ5
A5
DQ6
A6
DQ7
A7
DQ8
A8
DQ9
A9
DQ10
A10
DQ11
A11
DQ12
A12
DQ13
DQ14
IO0
DQ15
IO1
IO2
DU3
IO3
DU26
IO4
DU27
IO5
DU28
IO6
DU29
IO7
DU23
IO8
DU21
IO9
DU20
IO10
DU19
IO11
DU18
IO12
DU17
IO13
DU16
IO14
DU15
IO15
NC32
NC1
NC3
NC5
NC7
DU13
NC9
DU14
NC11
NC13
NC14
NC16
NC18
NC20
NC22
NC24
NC30
NC31
NC38
NC36
DU12
NC39
NC33
NC34
NC41
NC40
NC37
NC35
DU11
NC2
DU10
NC4
DU9
NC6
DU8
NC8
DU22
NC10
DU7
NC12
DU6
VDDF2
DU5
NC15
DU4
NC17
DU24
NC19
DU25
NC21
DU1
NC23
DU2
NC25
NC26
NC27
_WP
NC28
R_
NC29
E_F
E_D
VDDD1
RB_
VDDD2
K_
VDDD3
K
KE
VDDQD1
CL
VDDQD2
AL
W_F
VDDF1
_CAS
_RAS
VSSD2
LDQS
VSSD1
UDQS
VSSF1
DQM1
VSSF2
DQM0
VSSQD1
W_D
VSSQD2
BA0
VSSQD3
BA1
R404
10
L401
DNI
C402
0
DNI
C403
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
L
K
J
I
H
G
F
E
D
C
B
A
L
K
J
I
H
G
F
E
D
C
B
A
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
10
R405
MAX14TCC6
IC401
B5
C5
2
B
1
C
2
C
C3
A2
C4
D3
D1
D4
A1
B1
A3
B4
B3
A5
A4
D5
D2
BAT
VB
DN1
DP2
U1
UID
U2
RES
MIC
AUD1
CAP
AUD2
GND
ISET
IC
L
C
S
A
D
S
T
NI
COMN1
COMP2
T
T
A
B
V
p
2
24
0
4
C
1K
R408
C405
1u
1
0
4
A
V
5
1
0
2
0
S
8
1
C
L
V
E
2
0
4
A
V
5
1
0
2
0
S
8
1
C
L
V
E
22p
C414
R
W
P
V
+
V
0.
3
_
D
S
O
R
CI
M
_
G
E
R
V
K
0
3
3
9
0
4
R
8
0
4
C
u
2.
2
S
U
B
V
22p
C410
5
1
0
2
0
S
8
1
C
L
V
E
3
0
4
A
V
EVLC14S02050
VA404
C411
100n
1
0
4
D
Z
F
L-
2
1
D
S
P
C412
100n
K
3
3
01
4
R
FL401
NFM21PC105B1A3
4
3
2
1
IN
OUT
G1
G2
5
0
4
A
V
5
1
0
2
0
S
8
1
C
L
V
E
NUS3065MUTAG
U402
5
4
6
3
7
2
8
1
9
DRAIN_THERMAL
IN
VCC
GND
OUT
CNTRL
GATE
DRAIN
SRC
K
0
5
1
1
1
4
R
6
0
4
A
V
3
0
0
2
0
S
8
1
C
L
V
E
VREG_MSME_1.8V
TP401
TP
20K
R412
7
0
4
A
V
3
0
0
2
0
S
8
1
C
L
V
E
EVLC18S02003
VA408
K
0
1
31
4
R
5
1
0
2
0
S
8
1
C
L
V
E
9
0
4
A
V
S
U
B
V
V
6.
2
_
P
M
S
M
_
G
E
R
V
V
5
8.
2
_
MI
S
U
_
G
E
R
V
5
1
0
2
0
S
8
1
C
L
V
E
0
1
4
A
V
p
2
25
1
4
C
R414
2.2K
33u
C416
22p
C429
7
1
4
C
n
1
8
1
4
C
u
1
9
1
4
C
n
1
n
0
0
10
2
4
C
VREG_MSME_1.8V
1
1
4
A
V
5
1
0
2
0
S
8
1
C
L
V
E
2
1
4
A
V
0
5
0
2
0
S
4
1
C
L
V
E
HB-1M1005-601JT
600
FB403
51
4
R
K
0
0
1
K0
01
70
4
R
TP402
TP
TP
TP403
TP
TP404
n
0
0
11
2
4
C
2
2
4
C
n
1
VREG_MSME_1.8V
3
2
4
C
u
0
1
n
14
2
4
C
5
2
4
C
u
1
6
2
4
C
n
1
7
2
4
C
u
1
V
8.
1
_
E
M
S
M
_
G
E
R
V
7
1
4
R
K
0
1
FB402
HB-1M1005-601JT
600
C428
2.2u
K0
01
60
4
R
K0
01
30
4
R
K0
01
20
4
R
UART1_RX_DATA
UART1_TX_DATA
VBATT_TEMP
T
U
O
_
M
R
E
H
T
_
F
E
R
V
GND
EBI2_WE_N
EBI2_DATA[0]
EBI2_DATA[1]
EBI2_DATA[10]
EBI2_DATA[11]
EBI2_DATA[12]
EBI2_DATA[13]
EBI2_DATA[14]
EBI2_DATA[15]
EBI2_DATA[2]
EBI2_DATA[3]
EBI2_DATA[4]
EBI2_DATA[5]
EBI2_DATA[6]
EBI2_DATA[7]
EBI2_DATA[8]
EBI2_DATA[9]
EBI2_OE_N
I2C2_SDA
I2C2_SCL
FM_ANT
MIC2P
USB_DM
SDRAM_ADV_N
SDRAM_DATA[0]
SDRAM_DATA[1]
SDRAM_DATA[10]
SDRAM_DATA[11]
SDRAM_DATA[12]
SDRAM_DATA[13]
SDRAM_DATA[14]
SDRAM_DATA[15]
SDRAM_ADDR[0]
SDRAM_ADDR[1]
SDRAM_ADDR[2]
SDRAM_ADDR[3]
SDRAM_DATA[2]
SDRAM_ADDR[4]
SDRAM_ADDR[5]
SDRAM_ADDR[6]
SDRAM_ADDR[7]
SDRAM_ADDR[8]
SDRAM_ADDR[9]
SDRAM_ADDR[10]
SDRAM_ADDR[11]
SDRAM_ADDR[12]
SDRAM_DATA[3]
SDRAM_DATA[4]
SDRAM_DATA[5]
SDRAM_DATA[6]
SDRAM_DATA[7]
SDRAM_DATA[8]
SDRAM_DATA[9]
SDRAM_CKE[0]
SDRAM_CS_N[0]
SDRAM_DQM[0]
SDRAM_DQS[0]
SDRAM_DQS[1]
SDRAM_OE_N
SDRAM_WE_N
EBI2_CS1_N
EBI2_ALE_N
EBI2_CLE_N
SDRAM_DQM[1]
MICROSD_DETECT
MICROSD_DATA[0]
MICROSD_DATA[1]
MICROSD_DATA[2]
USW_INT
USIM_RST
USIM_CLK
USIM_DATA
NAND_READY
MICROSD_DATA[3]
MICROSD_CLK
USB_DP
RESOUT_N
SDRAM_CLK_M
SDRAM_CLK_P
SDRAM_ADDR[14]
SDRAM_ADDR[15]
SDRAM_ADDR[13]
USW_ID
USW_ID
USW_DP
USW_DP
USW_DM
USW_DM
HPH_OUT_L
HPH_OUT_R
MICROSD_CMD
EBI2_DATA[0:15]
SDRAM_ADDR[0:12]
SDRAM_DATA[0:15]
u-USB 5pin
USIM
FOR TEMP TEST
MUIC1-MAX14526
Default : Low
VBATT
Close by MAX14526
Active : High
NAND 1G/DDR 512M
MEMORY
MICRO SD
Close by uUSB CONN
BATT_CONNECTOR
REVERSE Type 1.78t
VBATT_GND
Matched to Curlcord