Lattice Semiconductor MachXO2-4000HC, Руководство пользователя

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23
MachXO2-4000HC Control Development Kit
User Guide
Figure 21. MachXO2 Top, Bottom
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
MachXO2 Bank 2
MachXO2 Bank 0
Interface between LVCMOS33 and LPDDR1.8V
LVCMOS33 Open Drain
LVCMOS33 Voltage Devider
I2C Bus Pull-up Resistors
Resistor Mux between Prototype Header and Video Channel 2 (7:1LVDS)
LPDDR_RASn LPDDR_CASn LPDDR_CSn LPDDR_WEn
LPDDR_BA1_3p3
LPDDR_BA0_3p3
LPDDR_CKE_3p3
LPDDR_CKE_1p8
LPDDR_BA1_1p8
LPDDR_BA0_1p8
SCL SDA
XO2_IN3_2_N XO2_IN3_2_P XO2_IN0_2_N XO2_IN0_2_P XO2_IN1_2_N XO2_IN1_2_P XO2_IN2_2_N XO2_IN2_2_P
XO2_CLKIN_2_N XO2_CLKIN_2_P XO2_GPIO_0 XO2_GPIO_1 XO2_GPIO_2 XO2_GPIO_3 XO2_GPIO_4 XO2_GPIO_5 XO2_GPIO_6 XO2_GPIO_7
XO2_GPIO_8 XO2_GPIO_9
XO2_IO_7 XO2_IO_8 XO2_IO_9 XO2_IO_0 XO2_IO_1 XO2_IO_2 XO2_IO_3 XO2_IO_4 XO2_IO_5 XO2_IO_6
SW0
LPDDR_CKE_3p3
SW1 SW2
XO2_SPI_CS0 PM_SMBA_OUT3 XO2_SPI_CLK PM_IN1 PM_IN2
XO2_GPIO_11 SERTFG2-
SERTFG1- SERTC1-
SERTC- SERTC+ SERTFG-
MISO
MOSI
XO2_CLKOUT_P
XO2_TCK
XO2_TDI
XO2_TMS
SCL
XO2_TDO_PIN
SDA
XO2_OUT1_N
XO2_OUT1_P
XO2_OUT2_N
XO2_OUT2_P
XO2_OUT3_N
XO2_OUT3_P
XO2_CLKOUT_N
LPDDR_WEn LPDDR_CASn LPDDR_CSn SERTC- SERTC+ SERTFG- LPDDR_BA1_3p3 XO2_OUT0_N XO2_OUT0_P LPDDR_BA0_3p3
XO2_IN3_1_P XO2_IN3_1_N XO2_IN1_1_N XO2_IN1_1_P XO2_CLKIN_1_N XO2_CLKIN_1_P XO2_IO_0 XO2_IO_1 XO2_IO_2 XO2_IO_3 XO2_IO_4 XO2_IO_5 XO2_IO_7 XO2_IO_6 XO2_IO_8 XO2_IO_9
XO2_IN2_1_N XO2_IN2_1_P XO2_IN0_1_N XO2_IN0_1_P
SERTC2-
LPDDR_RASn
VCC18
VCC33
VCCIO33
VCCIO33
VCCIO33
VCCIO33
LPDDR_BA0
[8]
LPDDR_BA1
[8]
LPDDR_CKE
[8]
XO2_IN3_2_N
[10]
XO2_IN3_2_P
[10]
XO2_IN2_2_P
[10]
XO2_CLKIN_2_N
[10]
XO2_IN0_2_N
[10]
XO2_IN0_2_P
[10]
XO2_IN1_2_N
[10]
XO2_IN1_2_P
[10]
XO2_IN2_2_N
[10]
XO2_CLKIN_2_P
[10]
XO2_GPIO_0
[7]
XO2_GPIO_1
[7]
XO2_GPIO_2
[7]
XO2_GPIO_3
[7]
XO2_GPIO_4
[7]
XO2_GPIO_5
[7]
XO2_GPIO_6
[7]
XO2_GPIO_7
[7]
XO2_GPIO_8
[7]
XO2_GPIO_9
[7]
SW0
[7]
SW1
[7]
SW2
[7]
XO2_SPI_CS0
[8]
PM_SMBA_OUT3
[4]
XO2_SPI_CLK
[7,8]
PM_IN1
[4]
PM_IN2
[4]
XO2_GPIO_11
[7]
SERTC2-
[11]
[11]
SERTFG2-
[11]
[11]
SERTFG1-
[9]
[9]
SERTC1-
[9]
[9]
XO2_SPI_OUT
[7,8]
XO2_SPI_IN
[7,8]
XO2_CLKOUT_P
[11]
XO2_TDI
[6,13]
XO2_TCK
[6,7,13]
XO2_TMS
[6,7,13]
SCL
[4,7]
XO2_TDO_PIN
[13]
SDA
[4,7]
XO2_OUT2_P
[11]
XO2_OUT3_N
[11]
XO2_OUT3_P
[11]
XO2_CLKOUT_N
[11]
XO2_OUT1_N
[11]
XO2_OUT1_P
[11]
XO2_OUT2_N
[11]
LPDDR_WEn
[8]
LPDDR_CASn
[8]
LPDDR_CSn
[8]
SERTC-
[11]
SERTC+
[11]
SERTFG-
[11]
[11]
XO2_OUT0_N
[11]
LPDDR_RASn
[8]
XO2_OUT0_P
[11]
XO2_IN3_1_P
[9]
XO2_IN3_1_N
[9]
XO2_IN1_1_N
[9]
XO2_IN1_1_P
[9]
XO2_CLKIN_1_N
[9]
XO2_CLKIN_1_P
[9]
XO2_IN2_1_N
[9]
XO2_IN2_1_P
[9]
XO2_IN0_1_N
[9]
XO2_IN0_1_P
[9]
Title
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5555 N.E. Moore Court Hillsboro, Oregon. 97124 www.latticesemi.com
MachXO2 Control Board
G
XO2 Banks 0, 2
B
14
14
Tuesday, June 26, 2012
Title
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R
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or
P
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S
t
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h
S
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et
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D
of
5555 N.E. Moore Court Hillsboro, Oregon. 97124 www.latticesemi.com
MachXO2 Control Board
G
XO2 Banks 0, 2
B
14
14
Tuesday, June 26, 2012
Title
v
e
R
t
c
ej
or
P
e
zi
S
t
e
e
h
S
:
et
a
D
of
5555 N.E. Moore Court Hillsboro, Oregon. 97124 www.latticesemi.com
MachXO2 Control Board
G
XO2 Banks 0, 2
B
14
14
Tuesday, June 26, 2012
R258
0
DNI
R258
0
DNI
C92 0_1uF DI C92 0_1uF DI
R187
820
DI R187
820
DI
R52
0
DNI
R52
0
DNI
R153
0
DI
R153
0
DI
R238
0
DI
R238
0
DI
C101 0_1uF DNI C101 0_1uF DNI
R183
1K
DI R183
1K
DI
R57
0
DNI
R57
0
DNI
R176
1K
DI R176
1K
DI
R259
0
DNI
R259
0
DNI
C102 0_1uF DNI C102 0_1uF DNI
R26
0
DNI
R26
0
DNI
1.2K/2K/4K 2nd Fn ^ = True LVDS
LCMXO2-1_2K/2K/4K-MN132 U4A
1.2K/2K/4K 2nd Fn ^ = True LVDS
LCMXO2-1_2K/2K/4K-MN132 U4A
PT10A^/PT11A^/PT11A^
A3
PT10B^/PT11B^/PT11B^
C4
PT10C/PT12C/PT13C TDO
A4
PT10D/PT12D/PT13D TDI
B4
PT11A^/PT13A^/PT14A^
B5
PT11B^/PT13B^/PT14B^
C6
PT11C/PT16C/PT15C TCK
B6
PT11D/PT16D/PT15D TMS
A6
PT12A^/PT17A^/PT18A^ PCLKT0_1
A7
PT12B^/PT17B^/PT18B^ PCLKC0_1
B7
PT12C/PT18C/PT20C/SCL PCLKT0_0
C8
PT12D/PT18D/PT20D/SDA PCLKC0_0
B8
PT15A^/PT19A^/PT21A^
C9
PT15B^/PT19B^/PT21B^
A9
PT15C/PT20C/PT23C JTAGENB
B9
PT15D/PT20D/PT23D PROGRAMN
C10
PT16A^/PT21A^/PT24A^
A10
PT16B^/PT21B^/PT24B^
C11
PT16C/PT22A^/PT25A^
A11
PT16D/PT22B^/PT25B^
B12
PT17A^/PT23A^/PT27A^
C12
PT17B^/PT23B^/PT27B^
A12
PT17C/PT24C/PT28C INITN
B13
PT17D/PT24D/PT28D DONE
A13
PT9A^/PT9A^/PT9A^
A2
PT9B^/PT9B^/PT9B^
B3
VCCIO0
A8
VCCIO0
B10
VCCIO0
C5
R177
1K
DI R177
1K
DI
R144
0
DI
R144
0
DI
R175
1K
DI R175
1K
DI
R263
0
DI
R263
0
DI
R255
0
DI
R255
0
DI
R30
0
DNI
R30
0
DNI
R260
0
DNI
R260
0
DNI
R178
1K
DI R178
1K
DI
R182
1K
DI R182
1K
DI
R90
4_7K
DI R90
4_7K
DI
R24
0
DNI
R24
0
DNI
R250
0
DI
R250
0
DI
R142
0
DI
R142
0
DI
R256
0
DI
R256
0
DI
R91
4_7K
DI R91
4_7K
DI
R143
0
DI
R143
0
DI
R35
0
DNI
R35
0
DNI
C86 0_1uF DNI C86 0_1uF DNI
R261
0
DNI
R261
0
DNI
R141
0
DI
R141
0
DI
R188
820
DI R188
820
DI
R264
0
DI
R264
0
DI
R253
0
DI
R253
0
DI
R251
0
DI
R251
0
DI
1.2K/2K/4K 2nd Fn
LCMXO2-1_2K/2K/4K-MN132
U4C
1.2K/2K/4K 2nd Fn
LCMXO2-1_2K/2K/4K-MN132
U4C
PB11A/PB16A/PB20A PCLKT2_1
M7
PB11B/PB16B/PB20B PCLKC2_1
N8
PB11C/PB12A/PB15A
P7
PB11D/PB12B/PB15B
N7
PB15A/PB18A/PB21A
P8
PB15B/PB18B/PB21B
M8
PB15C/PB19A/PB23A
P9
PB15D/PB19B/PB23B
N9
PB18A/PB21A/PB24A
M9
PB18B/PB21B/PB24B
N10
PB18C/PB22A/PB27A
M10
PB18D/PB22B/PB27B
P11
PB20A/PB24A/PB29A
M11
PB20B/PB24B/PB29B
P12
PB20C/PB25A/PB30A SN
N12
PB20D/PB25B/PB30B SI/SISPI
P13
PB4A/PB3A/PB3A
P2
PB4B/PB3B/PB3B
N2
PB4C/PB5A/PB4A CSSPIN
P3
PB4D/PB5B/PB4B
M3
PB6A/PB6A/PB7A
N3
PB6B/PB6B/PB7B
P4
PB6C/PB8A/PB9A MCLK/CCLK
M4
PB6D/PB8B/PB9B SO/SPISO
N4
PB9A/PB11A/PB13A PCLKT2_0
N6
PB9B/PB11B/PB13B PCLKC2_0
P6
PB9C/PB9A/PB10A
N5
PB9D/PB9B/PB10B
M5
VCCIO2
M6
VCCIO2
N11
VCCIO2
P1
R140
0
DI
R140
0
DI
C88 0_1uF DNI C88 0_1uF DNI
IO21IO21
R257
0
DNI
R257
0
DNI
R33
0
DNI
R33
0
DNI
R139
0
DI
R139
0
DI
R69
820
DI R69
820
DI
R262
0
DI
R262
0
DI
IO22IO22
R252
0
DI
R252
0
DI
R28
0
DNI
R28
0
DNI
R137
0
DI
R137
0
DI
R74
1K
DI R74
1K
DI
C103 0_1uF DI C103 0_1uF DI
R265
0
DI
R265
0
DI
R40
0
DNI
R40
0
DNI
R138
0
DI
R138
0
DI
C96 0_1uF DI C96 0_1uF DI
R254
0
DI
R254
0
DI
C100 0_1uF DI C100 0_1uF DI
R42
0
DNI
R42
0
DNI
R152
0
DI
R152
0
DI