Lattice Semiconductor MachXO2-4000HC, Руководство пользователя

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17
MachXO2-4000HC Control Development Kit
User Guide
Figure 15. Memory LPDDR, SD, SPI
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
4MBit SPI
Micro SD Card Socket
LPDDR - 128Mb (4 Meg x 4 banks x 8 data)
Lower Byte Mask & Strobe
Empty External Pull-UP resistors. The internal XO2 resistors are used for bias.
Package: UDFN
Package: SOIC8 (WIDE)
XO2_SPI_IN XO2_SPI_OUT
XO2_SPI_CS0
LPDDR_DQ0 LPDDR_DQ1 LPDDR_DQ2 LPDDR_DQ3 LPDDR_DQ4 LPDDR_DQ5 LPDDR_DQ6 LPDDR_DQ7 LPDDR_LDM LPDDR_LDQS
LPDDR_A0 LPDDR_A1 LPDDR_A2 LPDDR_A3 LPDDR_A4 LPDDR_A5 LPDDR_A6 LPDDR_A7 LPDDR_A8 LPDDR_A9 LPDDR_A10 LPDDR_A11 LPDDR_A12 LPDDR_CK LPDDR_CKn LPDDR_CKE LPDDR_CSn LPDDR_WEn LPDDR_RASn LPDDR_CASn LPDDR_BA0 LPDDR_BA1
uSD_DAT2 uSD_DAT1 uSD_DAT3 uSD_CMD uSD_CLK uSD_DAT0
LPDDR_DQ0 LPDDR_DQ1 LPDDR_DQ2 LPDDR_DQ3 LPDDR_DQ4 LPDDR_DQ5 LPDDR_DQ6 LPDDR_DQ7
XO2_SPI_IN
XO2_SPI_CLK
XO2_SPI_OUT
XO2_SPI_CS0 XO2_SPI_CLK
VCC33
VCC18
VCC18
VCC33
VCC18
VCC33
VCC33
LPDDR_DQ0
[14]
LPDDR_DQ1
[14]
LPDDR_DQ2
[14]
LPDDR_DQ3
[14]
LPDDR_DQ4
[14]
LPDDR_DQ5
[14]
LPDDR_DQ6
[14]
LPDDR_DQ7
[14]
LPDDR_LDM
[14]
LPDDR_LDQS
[14]
LPDDR_A0
[14]
LPDDR_A1
[14]
LPDDR_A2
[14]
LPDDR_A3
[14]
LPDDR_A4
[14]
LPDDR_A5
[14]
LPDDR_A6
[14]
LPDDR_A7
[14]
LPDDR_A8
[14]
LPDDR_A9
[14]
LPDDR_A10
[14]
LPDDR_A11
[14]
LPDDR_A12
[14]
LPDDR_CK
[14]
LPDDR_CKn
[14]
LPDDR_CKE
[14]
LPDDR_CSn
[14]
LPDDR_WEn
[14]
LPDDR_RASn
[14]
LPDDR_CASn
[14]
LPDDR_BA0
[14]
LPDDR_BA1
[14]
XO2_SPI_OUT
[7,14]
XO2_SPI_IN
[7,14]
XO2_SPI_CLK
[7,14]
XO2_SPI_CS0
[14]
uSD_DAT1
[14]
uSD_DAT2
[14]
uSD_DAT3
[14]
uSD_CMD
[14]
uSD_CLK
[14]
uSD_DAT0
[14]
Title
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5555 N.E. Moore Court Hillsboro, Oregon. 97124 www.latticesemi.com
MachXO2 Control Board
G
Memory LPDDR, SD, SPI
B
81
4
Tuesday, June 26, 2012
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5555 N.E. Moore Court Hillsboro, Oregon. 97124 www.latticesemi.com
MachXO2 Control Board
G
Memory LPDDR, SD, SPI
B
81
4
Tuesday, June 26, 2012
Title
v
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R
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or
P
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zi
S
t
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S
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D
of
5555 N.E. Moore Court Hillsboro, Oregon. 97124 www.latticesemi.com
MachXO2 Control Board
G
Memory LPDDR, SD, SPI
B
81
4
Tuesday, June 26, 2012
RN3
RN1_8_10K
DI
RN3
RN1_8_10K
DI
1 2 3 4 5 6 7 8
9
10 11 12 13 14 15 16
R158
10K
DI
R158
10K
DI
C71
0_001uF
DI
C71
0_001uF
DI
C79
0_1uF
DI
C79
0_1uF
DI
RN2
RN1_8_10K
DNI
RN2
RN1_8_10K
DNI
1 2 3 4 5 6 7 8
9
10 11 12 13 14 15 16
R234 1K DI R234 1K DI
U15 AT25DF041A-MH-B U15 AT25DF041A-MH-B
S
1
Q
2
W
3
Vss
4
Vcc
8
D
5
C
6
Reset
7
microSD Socket
U1
microSD Socket
U1 DAT2
1
CD/DAT3
2
CMD
3
CLK
5
DAT0
7
DAT1
8
VDD
4
VSS
6
MT46H16M16LFBF
U6
MT46H16M16LFBF
U6
A0
J8
A1
J9
A10
J7
A11
H2
A12
H3
A2
K7
A3
K8
A4
K2
A5
K3
A6
J1
A7
J2
A8
J3
A9
H1
BA0
H8
BA1
H9
CAS#
G8
CK
G2
CK#
G3
CKE
G1
CS#
H7
RAS#
G9
WE#
G7
DQ0
A8
DQ1
B7
DQ10
D3
DQ11
C2
DQ12
C3
DQ13
B2
DQ14
B3
DQ15
A2
DQ2
B8
DQ3
C7
DQ4
C8
DQ5
D7
DQ6
D8
DQ7
E7
DQ8
E3
DQ9
D2
LDM
F8
LDQS
E8
UDM
F2
UDQS
E2
NC
D9
NC
F3
NC
F7
VDD
A9
VDD
F9
VDD
K9
VDDQ
A7
VDDQ
B1
VDDQ
C9
VDDQ
D1
VDDQ
E9
VSS
A1
VSS
F1
VSS
K1
VSSQ
A3
VSSQ
B9
VSSQ
C1
VSSQ
E1
C81
0_1uF
DI
C81
0_1uF
DI
R159
10K
DI
R159
10K
DI
U14 AT25DF041A-SH-B U14 AT25DF041A-SH-B
S
1
Q
2
W
3
Vss
4
Vcc
8
D
5
C
6
Reset
7
C72
0_01uF
DI
C72
0_01uF
DI
C75
0_1uF
DI
C75
0_1uF
DI
C74
0_1uF
DI
C74
0_1uF
DI
R186 0 DI R186 0 DI