ASC Bridge Board
Evaluation Board User Guide
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FPGA-EB-02025-2.0
23
Table D.4. Miscellaneous – ECP5 Versa Development Board and ASC Bridge Board Connections
Bridge Board
Signal Name
J2 Pin
X4 Pin
J3 Pin
X3 Pin
ECP5 Versa Board
Signal Name
ECP5 Ball
Project Designer
Signal Name
I2C_SDA
1
16
—
EXPCON_IO13
B10
SCL
I2C_SCL
1
18
—
EXPCON_IO15
E12
SDA
I2C_WRITE_EN
2
32
—
EXPCON_IO23
D16
—
PB1 (SW1)
15
—
EXPCON_IO12
A9
User Defined
PB2 (SW2)
21
—
EXPCON_IO16
B15
User Defined
MANDATORY_RESET
28
—
EXPCON_IO20
A16
User Defined
FAN1_PWM
—
19
EXPCON_IO40
C7
User Defined
FAN1_TACH
—
20
EXPCON_IO45
C6
User Defined
FAN2_PWM
—
17
EXPCON_IO42
D8
User Defined
FAN2_TACH
—
18
EXPCON_IO43
E8
User Defined
FAN3_PWM
—
15
EXPCON_IO44
B8
User Defined
FAN3_TACH
—
16
EXPCON_IO41
C8
User Defined
EXPCON_OSC
3
—
29
EXPCON_OSC
—
—
EXPCON_CLKIN
—
31
EXPCON_CLKIN
A10
—
EXPCON_CLKOUT
—
33
EXPCON_CLKOUT
E11
—
HPE_RESOUT#
1
HPE_RESOUT#
A8
—
EXPCON_IO0
3
EXPCON_IO0
A12
User Defined
EXPCON_IO2
5
EXPCON_IO2
B13
User Defined
EXPCON_IO14
17
—
EXPCON_IO14
D12
User Defined
EXPCON_IO17
23
—
EXPCON_IO17
C15
User Defined
CARDSEL#
38
—
CARDSEL#
A7
User Defined
Notes:
SDA and SCL signal mapping shown are for SW3 (I
2
C Select) in the MachXO3 position.
If I2C_WRITE_EN is not used, remove R4 on the ASC Breakout Boards to isolate their GPIO1 (LED1) signals; the I2C_WRITE_EN
signal is bussed to all three ASC connectors on the ASC Bridge board.
ispCLOCK5406D BANK_2P (U13 pin 27).