L-Card ADC Series, Руководство пользователя

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Automatic prohibition (stop) after entering the specified number of frames (from 1 to
2
32
-1 frames) with the possibility of re-authorization (if the previously set resolution
condition is repeated) without restarting the primary synchronization scheme
3.3.6. Adjustment of the ratio between the time of setting the signal and the
resolution for each ADC channel.
Above was the principle of the frame-by-line input of ADC data, which was applied in all L-
CARD ADCs with the input channel switch, up to synchronization frequency, frame size and
interframe delay. But in L-502 and E-502 this principle is developed for the better adaptation to the
output physical properties of the signal source. Further we will discuss it more precisely.
If E-502 is used at the highest possible data acquisition frequency from each channel, then set
n
sw
= 1, which means that the sampling period of one measurement channel is t
sw
= t
ref
, during which
only one ADC sample is converted. For example, for f
ref
=2 MHz time t
sw
= t
ref
= 0,5 μs is a fairly
short switching period of the channel switch, which imposes restrictions on the output impedance of
the signal source (and the wires from it): the impedance should be sufficiently small (not more than
50 Ohm) and not have a large reactive component, so that the duration of the transient process caused
by circuit switching does not exceed 0.5 μs. In other words, the signal sourse should be no more than
50 Ohm and have a short or coordinated cable. For those who used the L-783, these requirements and
these application conditions roughly correspond to the conditions of application of the L-783 in the
multichannel mode at the maximum ADC conversion frequency of the 3 MHz, but with the difference
that the ADC resolution of the E-502 is 16 bits rather than 12, and the electronic switch in the E-502
is much more "quiet" (i.e., injects significantly less parasitic charge into the signal circuit at the time
of commutation, and therefore causes a significantly smaller shock excitation for a possible transient
process in the signal circuit).
But if it is required to use the E-502 at a data acquisition rate for each channel less than the
maximum, and it is possible to reduce the switching frequency, then in E-502 with internal
synchronization there is no reduction in the frequency of ADC startup, and
n
sw
> 1 is set, for example,
as it is shown in the example on
fig. 3-1
. But, in the sense of n
sw
– this is the number of cycles of
ADC conversion for one switching period. In the E-502 it is set by default that for n
sw
>1, all ADC
readouts are flipped, except for the last one, during the switching period. It creates the maximum
settling time after commutation (due to "idle" ADC conversion cycles), therefore the least stringent
requirements are imposed to the impedance of the signal source. On
fig. 3-3
, with n
sw
=3, such
conditions are set "by default" for the logical channel 1: the first two counts are always discarded,
and the third one is used. But the real tasks of using multichannel ADCs do not assume that the
impedances of the signal sources are the same, and for channels with connected low-impedance
sources it would be good not to discard at least some of the ADC samples, but to use them for
averaging the data, thereby increasing the enable when measuring this channel. Such option is
provided for in E-502 due to the fact that in every cell of the control table, besides the physical channel
number, there is also the averaging factor
n
av
, by default, n
av
= 1. Averaging factor n
av
={1,2,…,128}
means: "how many counts of the ADC from the end of the switching cycle of this channel will be
used to averaging the data". Accordingly,
n
su
= n
sw
- n
av
means "how many ADC counts from the
beginning of the switching cycle of the given channel will be discarded", or "how many periods t
ref
will be used to set the signal at the ADC input after switching".
For example, on
fig. 3-3
for navigational channel 2, n
av
= 2 is installed in the control table,
which means that for n
sw
=3 the result of the last two conversion periods in one switching phase will
be used for averaging, and one first period is added to the time of signal establishment after switching.
For logical channel 3, all three samples of the ADC are used for averaging, and therefore the minimum
time is assigned here to establish a signal after switching.