BIOS POST Check Point List 4-47
SBC-845D-VEA Single Board Computer User’s Guide
BI
OS
S
etup
Code
Description
CFh
Test CMOS R/W functionality.
C0h
Early chipset initialization:
-Disable shadow RAM
-Disable L2 cache (socket 7 or below)
-Program basic chipset registers
C1h
Detect memory
-Auto-detection of DRAM size, type and ECC.
-Auto-detection of L2 cache (socket 7 or below)
C3h
Expand compressed BIOS code to DRAM
C5h
Call chipset hook to copy BIOS back to E000 & F000 shadow
RAM.
0h1
Expand the Xgroup codes locating in physical address 1000:0
02h
Reserved
03h
Initial Superio_Early_Init switch.
04h
Reserved
05h
1. Blank out screen
2. Clear CMOS error flag
06h
Reserved
07h
1. Clear 8042 interface
2. Initialize 8042 self-test
Содержание SBC-845D-VEA
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Страница 27: ...Chapter 1 Introduction Contents Overview 1 3 Check List 1 4 Product Specification 1 5 System Architecture 1 8...
Страница 35: ...Chapter 2 Jumpers and Connectors Contents Overview 2 3 Jumpers 2 3 Connectors 2 6 Connector Pin Assignments 2 9...
Страница 129: ...Chapter 5 ATX Power Settings Contents Overview 5 3 Backplane 5 3 P4 Power connector 5 3 ATX power 5 3...