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CP3005-SA – Rev. 0.6 Preliminary
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3.9.7.
Debug Interface
The CP3005-SA provides several onboard options for hardware and software debugging, such as:
Four bicolor general purpose LEDs (LED0 to LED3), which indicate hardware failures, uEFI BIOS POST codes and
user-configurable outputs
One JTAG connector, J13, for programming the onboard logic
One CMC 35-pin ITP adapter port with XDP connector for processor debugging (J15)
Two USB2.0-based debug ports, J5 and J6, for facilitating the debug of the operating system and the device driver
3.9.8.
CompactPCI Interface
The CP3005-SA supports a flexible CompactPCI interface with a hot plug power interface (no PCI hot swap). In the
system slot the PCI interface is in transparent mode, and in the peripheral slot the CompactPCI interface is isolated so
that it cannot communicate with the CompactPCI bus. This mode is known as "passive mode".
3.9.8.1.
Board Functionality when Installed in System Slot
In a system slot, the CompactPCI interface is provided as 32-bit/33 MHz (66 MHz upon request) PCI interface. The
CP3005-SA supports up to seven peripheral slots through a CompactPCI backplane.
The PCI clock signals to unpopulated peripheral slots must be disabled by using the
kboardconfig uEFI Shell command. This is essential to maintain conformity to the CE mark
and the FCC EMI requirements. Please contact Kontron for further information.
The CP3005-SA supports universal PCI V(I/O) signaling voltages with one common resistor
configuration. For both 5V and 3.3 V PCI signaling voltages, 2.7 kW pull-up resistors are used.
3.9.8.2.
Board Functionality when Installed in Peripheral Slot (Passive Mode)
In a peripheral slot, the board receives power but does not communicate on the CompactPCI bus; all CompactPCI
signals are isolated.
3.9.8.3.
Front/Rear I/O Configuration
The CP3005-SA is available in two versions:
CP3005-SA front I/O version
CP3005-SA rear I/O version
Please ensure that the correct version is stated on the order. If the CP3005-SA is ordered with rear I/O configuration,
various I/O interfaces and signals are available via the CompactPCI connector J2, such as USB, SATA, GbE, VGA, COM,
power and management signals. If the CP3005-SA is ordered with front I/O configuration, the I/O interfaces and
signals mentioned above are isolated from the CompactPCI connector J2.
The CP3005-SA front I/O version does not provide 64-bit CompactPCI terminations to the
backplane via the CompactPCI connector J2. With regard to this aspect, the CP3005-SA
differs from previous boards such as CP307 or CP308 where 64-bit CompactPCI terminations
are provided.