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Troubleshooting
18
Keysight RP7900 Series Advanced Service Guide
–
Power Good (PG) signal:
If the PG signal is not detected, the input board can
shut down the isolation boards and bias board and create a “Channel Fail”
error code at display.
–
Power Fault (PF) signal:
If the PF signal is detected, the input board asserts
this signal when it determines if the output power should be inhibited to
preserve rail charge in the event of a line fault.
3-phase AC/DC front end:
The 3-phase AC/DC front end consists of the Power Factor Correction (PFC)
bias-control board, PFC driver board, and PFC inverter board. Its main function is
to convert the 3-phase AC input voltage to the require DC voltage as shown in
table below.
The AC front end will assert a PF signal to the secondary FPGA when the line
conditions are severe enough that the output power should be restricted or if the
rail voltage dips below a ‘power fault’ level. The purpose of this signal is to quickly
notify the regulation board to temporarily latch its output in the event of a brief
line drop out.
Model
AC 3-phase input
DC output
RP7951A, RP7952A, RP7953A
208 Vrms
425 Vdc
RP7961A, RP7962A, RP7963A
400 Vrms
980 Vdc