Keysight M9484C, Руководство по началу работы и устранению неисправностей

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80 M9484C Startup Guide
Front and Rear Panel Features
Rear-Panel Features
7
100 MHz Out
a
SMA Output of 100 MHz reference signal is to be connected to SClk In.
This port is always on and its output level is +15 dBm (nominal).
If alternate SCLK In is provided this port should be terminated with
50 Ω load.
Ports 7 and 8 are connected by a factory installed cable.
8
SClk In
a
SMA Synchronization clock input.
50
Ω impedance. +2 dBm to +12 dBm
9 SClk Out SMA Reserved for future use.
Synchronization clock output.
50
Ω impedance. +2 dBm nominal
10 STrig Out SMA Synchronization trigger input/output. To be connected to
downstream STrig In for synchronization.
Input:
Threshold is adjustable from 0 V to 3.3 V
1 M
Ω impedance
Output:
VOL < 0.4 V, VOH is 2.8 V to 3.3 V into high impedance
50
Ω impedance (nominal)
Damage level is outside of -0.5 V to 3.8 V
11 STrig In SMA Synchronization trigger input/output. To be connected to upstream
STrig Out for synchronization.
Input:
Threshold is adjustable from 0 V to 3.3 V
1 M
Ω impedance
Output:
VOL < 0.4 V, VOH is 2.8 V to 3.3 V into high impedance
50
Ω impedance (nominal)
Damage level is outside of -0.5 V to 3.8 V
12 EFC SMA Reserved for future use.
ESD damage level is 30 V
a. The SClk In and 100 MHz Out ports are designed for phase coherent operation between one or more M9484C
VXG signal generators with Option SNC. The SClk In port should only be used to connect to upstream SClk Out
from other VXGs. Keysight Technologies recommends that you do not connect any other signals to the SClk In
port as the instrument specifications will not be covered by the warranty.
Jumper removal and connection should be performed when the VXG is powered off.
Item Connector Type
Description
# Name