TK-361SA
9
■
Receive Signaling
• QT/DQT
The output signal from FM IC (IC201) enters the MCU
(IC405) through IC301. IC405 determines whether the QT or
DQT matches the preset value, and controls the SP MUTE
and the speaker output sounds according to the squelch re-
sults.
3. PLL Frequency Synthesizer
The PLL circuit generates the fi rst local oscillator signal
for reception and the RF signal for transmission.
■
PLL
The frequency step of the PLL circuit is 5 or 6.25kHz.
A 12.8MHz reference an oscillator signal is divided at IC1
by a fi xed counter to produce oscillator (VCO) output signal
which is buffer amplifi ed by Q2 then divided in IC1 by a pro-
grammable counter. The divided signal is compared in phase
with the 5 or 6.25kHz reference signal from the phase com-
parator in IC1. The output signal from the phase comparator
is fi ltered through a low-pass fi lter and passed to the VCO
to control the oscillator frequency. (See Fig. 4)
■
VCO
The operating frequency is generated by Q4 in transmit
mode and Q3 in receive mode. The oscillator frequency is
controlled by applying the VCO control voltage, obtained
from the phase comparator, to the varactor diodes (D2, D4,
D6 and D7 in transmit mode and D3, D5, D8 and D9 in re-
ceive mode). The RX pin is set high in receive mode causing
Q5 turn on.
The TX pin is set high in transmit mode. The outputs
from Q3 and Q4 are amplifi ed by Q6 and sent to the RF am-
plifi ers.
D2,4
D6,7
Q4
TX VCO
D3,5
D8,9
Q3
RX VCO
Q6
BUFF AMP
Q2
RF AMP
Q9
RF AMP
LPF
LPF
Q5,7
T/R SW
RX
TX
REF OSC
1/M
1/N
Phase
comparator
Charge
pump
5kHz/6.25kHz
5kHz/6.25kHz
PLL DATA
X1
12.8MHz
IC1
PLL IC
Fig. 4 PLL circuit
■
Unlock Detector
If a pulse signal appears at the LD pin of IC1, an unlock
condition occurs, and the DC voltage obtained from C4, R5,
and D1 causes the voltage applied to the MCU (IC405) to go
low. When the MCU detects this condition, the transmitter
is disabled, ignoring the push-to-talk switch input signal.
4. Transmitter System
■
Microphone Amplifi er
The signal from the microphone passes through IC301.
The signal passes through the Audio processor (IC301)
for the maximum deviation adjustment, and goes to the
VCO modulation input.
AGC
LPF
LPF
VCO
LPF
TCXO
MIC
IC301
AQUA-L
IC405
MCU
QTVCO
BEEP
QTTCXO
X1
Fig. 5 Microphone amplifi er
■
Drive and Final Amplifi er
The signal from the T/R switch (D101) is amplifi ed by the
pre-drive (Q101) to 50mW.
The output of the drive amplifi er is amplifi ed by the RF
power amplifier (Q102 and Q103) to 2W (1W when the
power is low). The RF power amplifi er consists of two MOS
FET stages. The output of the RF power amplifi er is then
passed through the harmonic fi lter (LPF) and antenna switch
(D103 and D122) and applied to the antenna terminal.
T/R SW
(D101)
Drive
AMP
Pre-drive
AMP
Q101
Q102
RF
AMP
Q100
Final
AMP
Q103
ANT
SW
LPF
D103,122
ANT
VDD
VG
IC101
(1/2)
IC101
(2/2)
R127
R128
R129
+B
PCTV
(IC405)
5T
5T
VD
VG
VG
Fig. 6 Drive and fi nal amplifi er and APC circuit
■
APC Circuit
The APC circuit always monitors the current flow-
ing through the RF power amplifi er (Q102 and Q103) and
keeps a constant current. The voltage drop at R127, R128
and R129 is caused by the current fl owing through the RF
power amplifi er and this voltage is applied to the differential
amplifi er IC101 (1/2).
CIRCUIT DESCRIPTION