23
DDX6027/6027Y/7017
DDX7037/7047/7067
Pin No.
Pin Name
I/O
Application
1
SW_2
I
8cm Ej-STOP, Lo-START detection
2
SW_3
I
Lo-START detection
3
CDON
O
CD-LD ON
4
VDD3
-
VDD (3.3V)
5
VSS
-
VSS
6
FG
I
Motor FG input
7
SW_4
I
Lo-END detection
8,9
FADR17,18
O
Address output to FLASH
10
FADR11
O
Address output to FLASH
11
FADR9
O
Address output to FLASH
12
VDD15
-
VDD (1.5V)
13
FADR8
O
Address output to FLASH
14,15
FADR13,14
O
Address output to FLASH
16
NWE
O
Right signal output to FLASH
17,18
FADR16,15
O
Address output to FLASH
19
DRAMVDD15
-
DRAM power supply (1.5V)
20
DRAMVSS
-
VSS for DRAM
21
VSS
-
VSS
22
FADR12
O
Address output to FLASH
23~30
FADR7~0
O
Address output to FLASH
31
VSS
-
VSS
32
VDD3
-
VDD (3.3V)
33~40
FDT0~7
I/O
Data input/output with FLASH
41
NCE
O
Chip select signal output to FLASH
42
FADR10
O
Address output to FLASH
43
NOE
O
Read signal output to FLASH
44
MMOD
I
Test mode switching signal
45
NRST
I
Reset input
46
VSS
-
VSS
47
SCLOCK
I/O
Dwire clock terminal
48
SDATA
I/O
Dwire data terminal
49
TxD/EXTRG0
I/O
Serial transmission/
Dwire trigger terminal
50
RxD/EXTRG1 I/O
Serial reception/
Dwire trigger terminal
51
VDD3
-
VDD (3.3V)
52
OSCI
I
Oscillation input (16.897849MHz)
53
OSCO
O
Oscillation output (16.897849MHz)
54
VSS
-
VSS
Pin No.
Pin Name
I/O
Application
55
OFS_TE
O
CD TE offset cancel output
56
DRV1
O
Drive output for spindle drive
57
DRV2
O
Focus balance adjustment output
58
DVDON
O
DVD-LD ON
59
STEP_A
O
Thread control output A
60
STEP_B
O
Thread control output B
61
Lo/Ej
O
Lo/Ej control terminal
62
LO.MUTE
O
Lo/Ej mute terminal
63
VSS
-
VSS
64
DRV.MUTE
O
Driver mute control
65
BMS
O
Spindle short brake control
66
LIM-SW
I
LIM-SW detection
67
Gain_SW
O
PDIC Gain switching
68
FEPCK
O
FEP clock output
69
FEPDT
O
FEP data output
70
FEPEN
O
FEP enable signal
71
DRAMVSS
-
VSS for DRAM
72
DRAMVDD15
-
DRAM power supply (1.5V)
73
DRAMVDD33
-
DRAM power supply (3.3V)
74
VDD3
-
VDD (3.3V)
75
FG
I
Motor FG input
76
TX
O
Output for digital OUT
77
VDD15
-
VDD (1.5V)
78
VSS
-
VSS
79
TSTSG
O
EQ calibration signal
80
VFOSHORT
O
Not used.
81
JLINE
O
J-line setting output
82
BDO
I
Dropout signal input
83
OFTR
I
Off-track signal input
84
AVSSD
-
VSS for analog
85
ROUT
O
MASH Rch audio output
86
LOUT
O
MASH Lch audio output
87
AVDDD
-
VDD (3.3V) for analog
88
VCOF
I
JFVCO control voltage
89
TRCRS
I
Track loss generation signal input
90
AVDDC
-
VDD (3.3V) for analog
91
WBLIN
I
WBL input
92
CSLFLT
I
Not used
93
RFDIF
I
Not used
MICROCOMPUTER’S TERMINAL DESCRIPTION
●
Disc Controller Microcomputer: MN103S71F (X37: IC4)
