6-11
ID data circuits
Upon power-up, card identification information from each
card is read by the mainframe. This ID data includes such
information as card ID, hardware settling time, and relay and
channel configuration information.
ID data is contained within an on-card EEPROM (U110). In
order to read this information, the sequence described below
is performed on power-up.
1. The IDDATA line (pin 5 of U110) is set from high to low
while the IDCLK line (pin 6 of U110) is held high. This
action initiates a start command to the ROM to transmit
data serially to the mainframe (Figure 6-8).
2. The mainframe sends the ROM address location to be
read over the IDDATA line. The ROM then transmits an
acknowledge signal back to the mainframe, and it then
transmits data at that location back to the mainframe
(Figure 6-9).
3. The mainframe then transmits an acknowledge signal,
indicating that it requires more data. The ROM will then
sequentially transmit data after each acknowledge sig-
nal it receives.
4. Once all data is received, the mainframe sends a stop
command, which is a low-to-high transition of the
IDDATA line with the IDCLK line held high
(Figure 6-8).
Figure 6-8
Start and stop sequences
Figure 6-9
Transmit and acknowledge sequence
IDCLK
IDDATA
Start Bit
Stop Bit
IDCLK
Acknowledge
Start
1
8
9
(
Data output
from mainframe
or ROM)
IDDATA
(Data output
from mainframe
or ROM)
IDDATA
Содержание 7037
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