Keithley 4200-SCS, Руководство пользователя

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4200-900-01 Rev. K / February 2017 Return to Section Topics 3-107
Model 4200-SCS User’s Manual Section 3: Common Device Characterization Tests
The endurance test is performed a set number of program and erase cycles (see
Figure 3-88 ), while periodically measuring V
T
for both the programmed and
erased state. Figure 3-90 shows typical degradation on a NOR cell for both V
TP
and V
TE
as the number of applied program/erase cycles increases.
Figure 3-90
Example results of V
T
shift in an Endurance test on a NOR flash cell.
Disturb testing
The purpose of the Disturb test is to pulse stress a device in an array test
structure, then perform a measurement, such as V
T
, on a device adjacent to the
pulsed device.
The goal is to measure the amount of V
T
shift in adjacent cells, either in the
programmed or erased states, when a nearby device is pulsed with either a
Program, Erase, or Erase waveform.
The typical measurement is a V
T
extraction based on a Vg-Id sweep, but any type
of DC test may be configured. This test is similar to the endurance test, but the
pulsing and measuring are performed on adjacent devices.
Figure 3-91 shows an example configuration to pulse stress a device (Cell 2) and
then test an adjacent device (Cell 1) in an array cell memory structure.
The solid-line blue circle indicates the cell to be pulse stressed, and the dotted-
line red circles are the adjacent memory cells that will be disturbed by the
stressing.
The stress / measure process is explained as follows.
Initial test conditions – SMU4 outputs a DC voltage to turn on the control
devices for the array. This connects instrumentation at the top of array to the flash
memory cells. SMU2 and SMU3 are set to output 0 V. This ensures that only the
Cell 2 will be turned on during pulse stressing.
Pulse stressing – The output relay for SMU1 is opened, and the gate and drain
of Cell 2 are pulse stressed by PG2 #1 (ch 1) and PG2 #2 (ch 1).
V
T
Program/Erase Cycles
10 10
2
10
3
10
4
10
5
10
6
V
TP
V
TE
Programmed State
Erased State
Voltage Threshold Window
Window Closure