Figure 23 Retrigger in Reference Trigger Mode .................................................. 37
Figure 27 PCIe/PXIe-6301 System Diagram ......................................................... 42
Figure 28 Resistance Measurement noise (4-wire, Level 0) ................................ 45
Figure 29 Resistance Measurement noise (4-wire, Level 1) ................................ 45
Figure 30 Resistance Measurement noise (4-wire, Level 2) ................................ 46
Figure 31 Resistance Measurement noise (4-wire, Level 3) ................................ 46
Figure 32 Resistance Measurement noise (4-wire, Level 4) ................................ 47
Figure 33 Resistance Measurement noise (4-wire, Level 5) ................................ 47
Figure 34 Resistance Measurement noise (3-wire, Level 0) ................................ 48
Figure 35 Resistance Measurement noise (3-wire, Level 1) ................................ 48
Figure 36 Resistance Measurement noise (3-wire, Level 2) ................................ 49
Figure 37 Resistance Measurement noise (3-wire, Level 3) ................................ 49
Figure 38 Resistance Measurement noise (3-wire, Level 4) ................................ 50
Figure 39 Resistance Measurement noise (3-wire, Level 5) ................................ 50
Figure 40 Typical Drift (250 Ω Input)
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