JPM MPS2, Руководство пользователя

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17
Interrupt lnterface
The 9995 allows the interfacing of up to three external interrupts as well as a reset line. The interrupts are as
follows in order of priority.
A) RESET.
B) NMI.
C) INTI.
D) INT4.
Each interrupt will now be dealt with in more detail.
A)
RESET - IC31 PIN 7
This signal is the main processor reset, which is produced on power on, or when the +5v line falls below
+4.5v.
The output from the device is used to reset a counter within IC15, which produces a long reset pulse of
approximately 4 seconds on IC15 pin 27.
B) NMI - IC16 PIN21
The non-maskable interrupt, NMI, is the next highest priority interrupt. This is used for major system
interrupts, where four separate interrupts are ored together to produce an NMI interrupt. These are:
(1) Mains Failure
(2) Invalid Memory Access.
(3) Watchdog timeout.
(4) On board switch (as Lev 3 in system 80).
All NMI processing is performed within IC16.
(1) Mains Failure NMI
The highest priority interrupt within the NMI interrupt is mains failure.
An AC winding from the power supply of 48v peak to peak is rectified by D23. The signal is used to
reset a counter, which has a timeout period of approximately 30 msec. If the mains is not present, the
counter will timeout and proved an interrupt source for an NMI.
(2) Invalid Memory Access NMI
The next highest NMI is the invalid memory access interrupt. If at any time the software attempts to
write to a ROM location or execute code in RAM, an invalid memory access will generate an NMI
at the processor.
(3) Watchdog Timeout NMI
The next highest NMI is the watchdog timeout interrupt. During normal execution of code, the
watchdog is strobed. This line is used to reset a counter, which has a timeout period greater than the
period used to set and reset watchdog strobe. If the software is caused to function incorrectly, and
this line is not strobed (due to static etc.) the counter will timeout, thus setting up the requirements
for an NMI.
(4) Reset Switch NMI
The last NMI interrupt source is the reset switch (Lev 3 in system 80) used for software resetting of
RAM after any RAM corruption. Closure of this switch will set up the conditions for an NMI to be
generated.
C) INTI - UART Interrupt
Interrupt 1, IC16 pin 15 is sourced via IC15 pin 29. The two inputs URT1 and URT2 are the interrupt outputs
from the two on-board UARTS, IC5 pin 1 and IC10 pin 1 respectively. A low level on either will define an
interrupt condition.
D) INT4- Meter Interrupt
On removal of the meter plug HD9, IC16 pin 14 will go low to produce an interrupt.