SECTION 2
2-1
Part No. 001-3474-002
INSTALLATION
2.1 PRE-INSTALLATION CHECKS
Field alignment should not be required before the 3474 is installed. However, it is a good practice to check
the performance to ensure that no damage occurred during shipment. Performance tests are located in Section 6.2.
2.2 INTERFACING WITH DATA EQUIPMENT
2.2.1 DM3474 ONLY
Connector J201 on the data transceiver PC board provides the interface with the data equipment. This is a 14-
pin female connector with .025" square pins on 0.1" centers (Dupont 76308-114).
The following is a general description of the various J201 input and output signals.
Pin 1 (Ground)
- Chassis ground.
Pin 2 (+7.5V DC Continuous)
- This voltage should be stabilized near +7.5V DC. Variations from +6V to +9V can
change power output as much as 6 dB.
Pin 3 (+7.5V DC Transmit)
- This input should be +7.5V DC in transmit mode only.
Pin 4 (+5V DC Receive Control Line)
- This input should be +5V DC in the receive mode only,
≤
0.3 V DC in Tx,
input impedance
≥
10k ohms.
Pin 5 (+5V DC Continuous)
- This voltage should be stabilized near +5V DC.
Pin 6 (Tx Input)
- Provides a response of
±
1.5 dB from DC to 5 kHz. The sensitivity is approximately 7 kHz
deviation per volt RMS. When this input is used, a temperature compensated 2.5V DC bias is required because
variations in voltage cause the frequency to change. In addition, the transceiver regulatory compliance must be
applied for with the customer supplied modulation limiting/filter circuit and chassis.
Pin 7 (Synthesizer Lock)
- Output from synthesizer lock detect circuit. Low = unlocked, high = locked.
Pin 8 (Synthesizer Enable)
- Latch enable signal. A rising edge on this input latches the data loaded into synthesizer
IC U801.
Pin 9 (Synthesizer Data)
- Serial data line used for programming synthesizer IC U801.
Pin 10 (Synthesizer Clock)
- Software generated serial clock. Data is valid on the rising edge of this signal.
Содержание DM3474
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