Jaton PowerPro VX, Руководство пользователя

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Intel Pentium CPUs
B-7
Pentium 200MHz
CPU CPU Internal Bus External Power CPU DP
Speed Spec Clock Factor Clock Vcore VIO Timing Supp. Note
P54CS Q0951 200MHz 3 66MHz VRE No PPGA up
P54CS SY045 200MHz 3 66MHz VRE Kit No PPGA up
P54CS 200 MHz Q0951F 200MHz 3 66MHz VRE Kit Yes PPGA
P54CS SY044 200MHz 3 66MHz VRE Yes PPGA
P55C Q018 200MHz 3 66MHz 2.8V 3.3V PPGA

Bus Factor
Power STD 3.15V~3.465V (Recommended voltage is 3.38V)
VR 3.300V~3.465V (Recommended voltage is 3.38V)
VRE 3.450V~3.6V (Recommended voltage is 3.52V)
Timing STD Standard Timing
MD
Min. Delay (denoting shorter minimum valid delay AC
timing for some signal)
Kit Supports timing for C55/C88 cache chip set & design
P54C
1. Beginning with the P54C E-Step, standard timings have been replaced by existing
Min Delay timing.
P54CS
1. P54CS PPGA UP: No DP, No APIC, No FRC
2. Beginning with the P54C E-Step, standard timings have been replaced by existing
Min Delay timing.
P55C
1. P55C A-Step is NOT production stepping
2. A-1 step:
Vcc and timing on initial samples is 2.9V +/- 0.1V
3. A-2 Step and B step: Vcc and timing on production stepping is 2.8V +/- 0.1V