eZ80F91 Modular Development Kit
QS004611-0810
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d = 25
f = 1.260000
eZ80F91 5 25 1.260000
Viewing the Starter Project Output via the ZDS II Cycle-Accurate
Simulator (Optional)
Follow the steps below to view the output of the
starter.zdsproj
project in the ZDS II
cycle-accurate simulator:
1. In ZDS II, open the
starter.zdsproj
project.
2. Select
Settings
from the
Project
menu in ZDS II. The
Project Settings
dialog box
appears. In the
Project Settings
dialog box, select the
Debugger
page.
3. In the
Debugger
page, select
eZ80F91ModDevKit_RAM
in the
Target
window by
checking the box next to the specific
Target Name
.
4. In the
Debugger
page, select
Simulator
from the
Debug Tool
drop-down menu.
5. Click
OK
to close the
Project Settings
dialog box.
6. If closing prompts you to rebuild the affected files, click
Yes
. Otherwise, select
Build
from the menu bar and click
Rebuild All
.
7. When the build is complete, explore the Debug toolbar for the various debugger fea-
tures. To connect to the simulator, select
Debug
Reset
.
8. Open the
Simulated UART Output
window to view the output of the program.
Select
View
Debug Windows
Simulated UART Output
.
9. To run the application, select
Debug
Go
.
10. Until the default settings are changed, the following output is viewed in the
Simulated
UART Output
window:
Zilog Developers Studio
i = 5
d = 25
f = 1.260000
eZ80F91 5 25 1.260000
11. Using the cycle-accurate simulator, you can view the sample code to study how it
works.
You can obtain a sample Zilog ZTP web application and an embedded security
SSL application by following the instructions on your kit registration card.
Note:
