Intel UPI- 41A, Руководство пользователя

Страница: 9 / 69

UPI-41A/41AH/42/42AH USER’S MANUAL
Features for Peripheral Control
The UPI 8-bit interval timer/event counter can be used
to generate complex timing sequences for control appli-
cations or it can count external events such as switch
closures and position encoder pulses. Software timing
loops can be simplified or eliminated by the interval
timer. If enabled, an interrupt to the CPU will occur
when the timer overflows.
The UPI I/O complement contains two TTL-compati-
ble 8-bit bidirectional I/O ports and two general-pur-
pose test inputs. Each of the 16 port lines can individu-
ally function as either input or output under software
control. Four of the port lines can also function as an
interface for the 8243 I/O expander which provides
four additional 4-bit ports that are directly addressable
by UPI software. The 8243 expander allows low cost
I/O expansion for large control applications while
maintaining easy and efficient software port addressing.
231318 – 4
Figure 1-4. 8243 I/O Expander Interface
On-Chip Memory
The UPI’s 64/128/256 bytes data memory include dual
working register banks and an 8-level program counter
stack. Switching between the register banks allows fast
response to interrupts. The stack is used to store return
addresses and processor status upon entering a subrou-
tine.
The UPI program memory is available in three types to
allow flexibility in moving from design to prototype to
production with the same PC layout. The 8741A/8742
device with EPROM memory is very economical for
initial system design and development. Its program
memory can be electrically programmed using the Intel
Universal PROM Programmer. When changes are
needed, the entire program can be erased using UV
lamp and reprogrammed in about 20 minutes. This
means the 8741A/8742 can be used as a single chip
‘‘breadboard’’ for very complex interface and control
problems. After the 8741A/8742 is programmed it can
be tested in the actual production level PC board and
the actual functional environment. Changes required
during
system debugging can be made in the
8741A/8742 program much more easily than they
could be made in a random logic design. The system
configuration and PC layout can remain fixed during
the development process and the turn around time be-
tween changes can be reduced to a minimum.
At any point during the development cycle, the
8741A/8742 EPROM part can be replaced with the
low cost UPI-41AH/42AH respectively with factory
mask programmed memory or OTP EPROM. The
transition from system development to mass production
is made smoothly because the 8741A/8742, 8741AH
and 8041AH, 8742AH and 8042AH parts are com-
pletely pin compatible. This feature allows extensive
testing with the EPROM part, even into initial ship-
ments to customers. Yet, the transition to low-cost
ROMs or OTP EPROM is simplified to the point of
being merely a package substitution.
PREPROGRAMMED UPI’s
The 8242AH, 8292, and 8294 are 8042AH’s that are
programmed by Intel and sold as standard peripherals.
Intel offers a complete line of factory programmed key-
board controllers. These devices contain firmware de-
veloped by Phoenix Technologies Ltd. and Award Soft-
ware Inc. See Table 1-3 for a complete listing of Intels’
entire keyboard controller product line. The 8292 is a
GPIB controller, part of a three chip GPIB system.
The 8294 is a Data Encryption Unit that implements
the National Bureau of Standards data encryption algo-
rithm. These parts illustrate the great flexibility offered
by the UPI family.
5