Intel UPI- 41A, Руководство пользователя

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UPI-41A/41AH/42/42AH USER’S MANUAL
CHAPTER 3
INSTRUCTION SET
The UPI-41A/41AH/42/42AH Instruction Set is op-
code-compatible with the MCS-48 set except for the
elimination of external program and data memory in-
structions and the addition of the data bus buffer in-
structions. It is very straightforward and efficient in its
use of program memory. All instructions are either 1 or
2 bytes in length (over 70% are only 1 byte long) and
over half of the instructions execute in one machine
cycle. The remainder require only two cycles and in-
clude Branch, Immediate, and I/O operations.
The UPI-41A/41AH/42/42AH Instruction Set effi-
ciently handles the single-bit operations required in
control applications. Special instructions allow port bits
to be set or cleared individually. Also, any accumulator
bit can be directly tested via conditional branch instruc-
tions. Additional instructions are included to simplify
loop counters, table look-up routines and N-way
branch routines.
The UPI-41A/41AH/42/42AH Microcomputer han-
dles arithmetic operations in both binary and BCD for
efficient interface to peripherals such as keyboards and
displays.
The instruction set can be divided into the following
groups:
#
Data Moves
#
Accumulator Operations
#
Flags
#
Register Operations
#
Branch Instructions
#
Control
#
Timer Operations
#
Subroutines
#
Input/Output Instructions
Data Moves
(See Instruction Summary)
The 8-bit accumulator is the control point for all data
transfers within the UPI-41A/41AH/42/42AH. Data
can be transferred between the 8 registers of each work-
ing register bank and the accumulator directly (i.e.,
with a source or destination register specified by 3 bits
in the instruction). The remaining locations in the
RAM array are addressed either by R
0
or R
1
of the
active register bank. Transfers to and from RAM re-
quire one cycle.
Constants stored in Program Memory can be loaded
directly into the accumulator or the eight working reg-
isters. Data can also be transferred directly between the
accumulator and the on-board timer/counter, the
Status Register (STS), or the Program Status Word
(PSW). Transfers to the STS register alter bits 4 – 7
only. Transfers to the PSW alter machine status ac-
cordingly and provide a means of restoring status after
an interrupt or of altering the stack pointer if necessary.
Accumulator Operations
Immediate data, data memory, or the working registers
can be added (with or without carry) to the accumula-
tor. These sources can also be ANDed, ORed, or exclu-
sive ORed to the accumulator. Data may be moved to
or from the accumulator and working registers or data
memory. The two values can also be exchanged in a
single operation.
The lower 4 bits of the accumulator can be exchanged
with the lower 4 bits of any of the internal RAM loca-
tions. This operation, along with an instruction which
swaps the upper and lower 4-bit halves of the accumu-
lator, provides easy handling of BCD numbers and
other 4-bit quantities. To facilitate BCD arithmetic a
Decimal Adjust instruction is also included. This
instruction is used to correct the result of the binary
addition of two 2-digit BCD numbers. Performing a
decimal adjust on the result in the accumulator produc-
es the desired BCD result.
The accumulator can be incremented, decremented,
cleared, or complemented and can be rotated left or
right 1 bit at a time with or without carry.
A subtract operation can be easily implemented in UPI
software using three single-byte, single-cycle instruc-
tions. A value can be subtracted from the accumulator
by using the following instructions:
#
Complement the accumulator
#
Add the value to the accumulator
#
Complement the accumulator
Flags
There are four user accessible flags:
#
Carry
#
Auxiliary Carry
#
F
0
#
F
1
The Carry flag indicates overflow of the accumulator,
while the Auxiliary Carry flag indicates overflow be-
tween BCD digits and is used during decimal adjust
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