Intel® Server Board S2600WF Product Family Technical Product Specification
116
•
BMC temperature sensor
3, 6
•
Global aggregate thermal margin sensors
7
•
Hot swap backplane temperature sensors
•
Intel® OCP module temperature sensor (with option installed)
•
Intel® SAS module (with option installed)
•
Riser card temperature sensors (2U systems only)
•
Intel® Xeon Phi™ coprocessor (2U system only with option installed)
Notes:
1
For fan speed control in Intel chassis
2
Temperature margin to max junction temp
3
Absolute temperature
4
PECI value or margin value
5
On-die sensor
6
Onboard sensor
7
Virtual sensor
8
Available only when PSU has PMBus
9
Calculated estimate
Figure 74 shows a high-level illustration of the fan speed control structure that determines fan speed.
Figure 74. High-level fan speed control process
12.3.3.6
Fan Boosting Due to Fan Failures
Each fan failure is able to define a unique response from all other fan domains. An OEM SDR table defines
the response of each fan domain based on a failure of any fan, including both system and power supply fans
(for PMBus*-compliant power supplies only). This means that if a system has six fans, there are six different
fan fail reactions.
12.3.4
Memory Thermal Management
The system memory is the most complex subsystem to manage thermally, as it requires substantial
interactions between the BMC, BIOS, and the embedded memory controller hardware. This section provides
an overview of this management capability from a BMC perspective.
Fan
speed
Events:
•
Intrusion
•
Fan failure
•
Power supply
failure
Memory
throttle
settings
Sensors:
•
Front panel
•
Processor
margin
•
Other sensors
(chipset, temp,
etc.)
Policy:
•
CLTT
•
Acoustic/
performance
•
Auto-profile
configuration
System behaviors
