Intel BX80605I5760, Спецификация

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12
Specification Update
AAN82
X No Fix
VM Exits Due to EPT Violations Do Not Record Information About Pre-IRET NMI
Blocking
AAN83
X No Fix
Intel® VT-d Receiving Two Identical Interrupt Requests May Corrupt Attributes of
Remapped Interrupt or Hang a Subsequent Interrupt-Remap-Cache Invalidation
Command
AAN84
X No Fix S1 Entry May Cause Cores to Exit C3 or C6 C-State
AAN85
X No Fix
Multiple Performance Monitor Interrupts are Possible on Overflow of
IA32_FIXED_CTR2
AAN86
X No Fix LBRs May Not be Initialized During Power-On Reset of the Processor
AAN87
X No Fix
Unexpected Interrupts May Occur on C6 Exit If Using APIC Timer to Generate
Interrupts
AAN88
X No Fix
LBR, BTM or BTS Records May have Incorrect Branch From Information After an
EIST Transition, T-states, C1E, or Adaptive Thermal Throttling
AAN89
X No Fix PECI GetTemp() Reads May Return Invalid Temperature Data in Package C6 State
AAN90
X No Fix
PECI PCIConfigRd() Followed by a GetTemp() May Cause System Hang in
Package C6 State
AAN91
X No Fix
PECI Mailbox Commands During Package C6 Idle State Transitions May Result in
Unpredictable Processor Behavior
AAN92
X No Fix VMX-Preemption Timer Does Not Count Down at the Rate Specified
AAN93
X No Fix
Multiple Performance Monitor Interrupts are Possible on Overflow of Fixed Counter
0
AAN94
X No Fix SVID and SID of Devices 8 and 16 only implement bits [7:0]
AAN95
X No Fix No_Soft_Reset Bit in the PMCSR Does Not Operate as Expected
AAN96
X No Fix VM Exits Due to LIDT/LGDT/SIDT/SGDT Do Not Report Correct Operand Size
AAN97
X No Fix
PCIConfigRd() and PCIConfigWr() PECI Commands May Silently Fail During
Package C6 Exit Events
AAN98
X No Fix
Performance Monitoring Events STORE_BLOCKS.NOT_STA and
STORE_BLOCKS.STA May Not Count Events Correctly
AAN99
X No Fix Storage of PEBS Record Delayed Following Execution of MOV SS or STI
AAN100
X No Fix
Performance Monitoring Event FP_MMX_TRANS_TO_MMX May Not Count Some
Transitions
AAN101
X No Fix
INVLPG Following INVEPT or INVVPID May Fail to Flush All Translations for a
Large Page
AAN102
X No Fix The PECI Bus May be Tri-stated After System Reset
AAN103
X No Fix LER MSRs May Be Unreliable
AAN104
X No Fix
MCi_Status Overflow Bit May Be Incorrectly Set on a Single Instance of a DTLB
Error
AAN105
X No Fix Debug Exception Flags DR6.B0-B3 Flags May be Incorrect for Disabled Breakpoints
AAN106
X No Fix An Exit From the Core C6-state May Result in the Dropping of an Interrupt
AAN107
X No Fix PCIe Extended Capability Structures May be Incorrect
AAN108
X No Fix PMIs During Core C6 Transitions May Cause the System to Hang
AAN109
X No Fix IA32_MC8_CTL2 MSR is Not Cleared on Processor Warm Reset
Errata (Sheet 4 of 5)
Number
Steppings
Status ERRATA
B-1