IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -4
Q1324 : CS42516-CQZ (192 kHz, 6-Ch Codec with S/PDIF Receiver)
BLOCK DIAGRAM
PIN CONFIGURATION
TX-SR806/SA806
TXP
VARX AGND LPFLT
DGND DGND VD
VD
INT
RST
AD0/CS
AD1/CDIN
SDA/CDOUT
SCL/CCLK
VLC
OMCK
RMCK
SAI_LRCK
SAI_SCLK
SAI_SDOUT
VLS
ADCIN1
ADCIN2
CX_SDOUT
CX_LRCK
CX_SCLK
CX_SDIN1
CX_SDIN2
CX_SDIN3
RXP0
RXP1/GPO1
RXP7/GPO7
RXP4/GPO4
RXP5/GPO5
RXP6/GPO6
RXP3/GPO3
RXP2/GPO2
MUTEC
FILT+
VQ
REFGND
VA
AGND
AINL+
AINL-
AINR+
AINR-
AOUTA1-
AOUTA3-
AOUTB2-
AOUTA2-
AOUTB1-
AOUTB3-
DAC#1
DAC#2
DAC#3
DAC#4
DAC#5
DAC#6
Analog Filter
ADC#1
ADC#2
Digital Filter
Digital Filter
Gain & Clip
Gain & Clip
DEM
Digital Filter
ADC
Serial
Data
Serial
Audio
Interface
Port
Mult/Div
Internal MCLK
Control
Port
C&U Bit
Data Buffer
Format
Detector
S/PDIF
Decoder
Clock/Data
Recovery
Rx
GPO
MUTE
Ref
V
o
lume Control
CODEC Ser
ial P
o
rt
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
CX_SDIN1
CX_SCLK
CX_LRCK
VD
DGND
VLC
SCL/CCLK
SDA/CDOUT
AD1/CDIN
AD0/CS
INT
RST
AINR-
AINR+
AINL+
AINL-
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
RXP1/GPO1
RXP2/GPO2
RXP3/GPO3
RXP4/GPO4
RXP5/GPO5
RXP6/GPO6
RXP7/GPO7
VARX
AGND
LPFLT
MUTEC
AOUTA1-
AOUTB1-
AOUTA2-
CS42516
CX_SDIN2
CX_SDIN3
TEST
SAI_SCLK
SAI_LRCK
OMCK
ADCIN1
ADCIN2
CX_SDOUT
RMCK
SAI_SDOUT
VLS
DGND
VD
TXP
RXP0
VQ
FIL
T+
REFGND
NC
NC
NC
NC
VA
AG
N
D
A
O
UTB3-
A
O
UTB3+
A
O
UT
A3+
A
O
UT
A3-
A
O
UTB2-
A
O
UTB2+
A
O
UT
A2+
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