MICROPROCESSOR TERMINAL DESCRIPTIONS -1
TX-SR806/SA806
Q1016: MPD70F3746
Internal A/D converter reference voltage 0.
A/D converter ground.
Cooling fan control output.
INT input from Video processor TORINO
Internal D/A converter reference voltage 1.
HDMI bus buffers control output.
Self-writing control output, connected to Pin 8.
Self-writing control input.
Power 3.3V.
Capacitor-connected pin for internal regulator.
Ground.
Pin to connect with oscillator.
Pin to connect with oscillator.
Reset input.
Not used. Connected with ground.
Not used. Open pin.
Not used. Open pin.
Power down/resume (P-OFF) detecting input.
Remote controller signal input.
Reset control input from debugger.
Ethernet reset control output.
RDS data input.
RS232/E-Control selecting output.
Video processor TORINO reset control output.
UART output.
UART input.
XM input.
XM input.
HDMI Transmitter’s DDC/EDID data input/output.
HDMI Transmitter’s DDC/EDID clock output.
HDMI Transmitter’s HotPlugDetect input.
HDMI Receiver’s HotPlugDetect output.
Ground.
Power 3.3V.
Output to Video processor TORINO.
Input from Video processor TORINO.
Key interrupt input 0.
Key interrupt input 1.
Debugger data input.
Debugger data output.
Debugger clock input.
Debugger’s transfer-mode selecting signal input.
HDMI Receiver-EEPROM communication data input/output.
HDMI Receiver-EEPROM Communication clock output.
HDMI Re5V detect.
SII9135/SII9185 control data input/output.
SII9135/SII9185 control clock output.
Interrupt input from SII9135.
DIR/CODEC/DSP data input.
DIR/CODEC/DSP data output.
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13
14
15
16
17
18
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Pin Name
Pin No.
I/O
Active
Description
AVREF0
AVSS
FANCTRL
VDLOCK
AVREF1
OERXTH
FLMD0O
FLMD0
VDD
REGC
VSS
X1
X2
RESET
XT1
XT2
NMI
POFF
REMIN
DRST
ERST
RDSDATA
RS_ETH
VSPRST
RS232TXD
RS232RXD
XMLNK
XMANT
SDA_TXDDC
SCL_TXDDC
HPD_TX
SDA_RXEDID1
SCL_RXEDID1
POWER_RX1
SDA_RX
SCL_RX
INT_RX
DIGSDI
DIGSDO
I
---
O
I
I
O
O
I
---
I
---
I
O
I
I
O
O
I
I
I
O
I
O
O
O
I
I
I
I/O
O
I
O
---
---
O
I
I
I
I
O
I
I
I/O
O
I
I/O
O
I
I
O
---
---
D/A
H
H
H
H
H
---
H
---
H
H
H
H
H
H
L
L
L
H
H
H
L
L
L
H
H
H
CLK
H
H
---
---
L
L
L
L
H
H
CLK
H
H
CLK
H
H
CLK
L
H
H
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