Q8801: ADV7172 (Digital PAL/NTSC Video Encoder with six DACs)
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -56
DTR-7.8
TERMINAL DESCRIPTION
Mnemonic
Input/Output
Function
P7–P0
I
8-Bit 4:2:2 Multiplexed YCrCb Pixel Port (P7ÐP0) P0 represents the LSB.
CLOCK
I
TTL Clock Input. Requires a stable 27 MHz reference clock for standard operation. Alter-
natively, a 24.5454 MHz (NTSC) or 29.5 MHz (PAL) can be used for square pixel operation.
I/O
(Modes 1 and 2) Control Signal. This pin may be configured to output (Master
Mode) or as an input and accept (Slave Mode) Sync signals.
FIELD/VSYNC
I/O
Dual Function FIELD (Mode 1) and
(Mode 2) Control Signal. This pin may be
configured to output (Master Mode) or as an input (Slave Mode) and accept these
control signals.
I/O
Video Blanking Control Signal. The pixel inputs are ignored when this is Logic Level "0."
This signal is optional.
SCRESET/RTC
I
T his pin can be configured as an input by setting MR42 and MR41 of Mode Register 4. It
can be configured as a subcarrier reset pin, in which case a low-to-high transition on this
pin will reset the subcarrier phase to Field 0. Alternatively it may be configured as a Real-
Time Control (RTC) Input.
V
REF
I/O
Voltage Reference Input for DACs or Voltage Reference Output (1.235 V).
R
SET1
I
A 150 resistor connected from this pin to GND is used to control full-scale amplitudes of
the Video Signals from DACs A, B, and C (the "large" DACs).
R
SET2
I
A 600 resistor connected from this pin to GND is used to control full-scale amplitudes of
the Video Signals from DACs D, E, and F (the "small" DACs).
COMP1
O
Compensation Pin for DACs A, B, and C. Connect a 0.1 uF Capacitor from COMP to
V
AA
. For Optimum Dynamic Performance in Low Power Mode, the value of the
COMP1 capacitor can be lowered to as low as 2.2 nF.
COMP2
O
Compensation Pin for DACs D, E, and F. Co nnect a 0.1 uF Capacitor from COMP to V
AA
.
DAC A
O
GREEN/Composite/Y Analog Output. This DAC is capable of providing 34.66 mA output.
DAC B
O
BLUE/S-Video Y/U Analog Output. This DAC is capable of providing 34.66 mA output.
DAC C
O
RED/S-Video C /V Analog Output. This DAC is capable of providing 34.66 mA output.
DAC D
O
GREEN/Composite/Y Analog Output. This DAC is capable of providing 8.66 mA output.
DAC E
O
BLUE/S-Video Y/U Analog Output. This DAC is capable of providing 8.66 mA output.
DAC F
O
RED/S-Video C/V Analog Output. This DAC is capable of providing 8.66 mA output.
SCLOCK
I
MPU Port Serial Interface Clock Input.
SDATA
I/O
MPU Port Serial Data Input/Output.
CLAMP
O
TTL Output Signal to external circuitry to enable clamping of all video signals.
PAL_NTSC
I
Input signal to select PAL or NTSC mode of operation, pin set to Logic "1" selects PAL.
O
VSO TTL Output Sync Signal.
O
D ual Function CSO or HSO TTL Output Sync Signal.
ALSB
I
TTL Address Input. This signal sets up the LSB of the MPU address.
RESET
I
T he input resets the on-chip timing generator and sets the ADV7172/ADV7173 into
default mode. This is NTSC operation, Timing Slave Mode 0, DACs A, B, and C powered
OFF, DACs D, E, and F powered ON, Composite and S-Video out.
TTX
I
I
T eletext Data Input Pin.
TTXREQ
O
T eletext Data Request output signal used to control teletext data transfer.
V
AA
Power Supply (3 V to 5 V).
GND
G
Ground Pin.
HSYNC
HSYNC
VSYNC
BLANK
VSO
CSO_HSO