TERMINAL DESCRIPTION(3/8)
Q8001: FLI8125-LF-BC (Video Processor)
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -47
DTR-7.8
Pin Name
No
I/O
Description
a 0.1uF capacitor and could be in the range of 0V to 3.3V (peak to peak).
LBADC_IN6
7
AI
Low Bandwidth Analog Input-6. The Input signal connected to this Pin, must be bypassed with
a 0.1uF capacitor and could be in the range of 0V to 3.3V (peak to peak).
LBADC_RTN
8
AG
This Pin provides the Return Path for LBADC inputs. Must be directly connected to the analog
system ground plane on board.
VSSA33_LBADC
9
AG
Analog Ground for Low Bandwidth ADC Block. Must be directly connected to the analog
system ground plane on board.
RCLK PLL Pins
Pin Name
No
I/O
Description
GND_RPLL
11
DG
Digital GND for ADC clocking circuit. Must be directly connected to the digital system ground
plane.
VDD_RPLL_18
12
DP
Digital power (1.8V) for ADC digital logic. Must be bypassed with capacitor to Ground Plane.
VBUFC_RPLL
13
O
Test Output. Leave this Pin Open. This is reserved for Factory Testing Purpose.
AGND_RPLL
14
AG
Analog ground for the Reference DDS PLL. Must be directly connected to the analog system
ground plane.
XTAL
15
AO
Crystal oscillator output. Connect to external crystal.
TCLK
16
AI
Reference clock (TCLK) from the 19.6608 MHz crystal oscillator. Connect to external crystal/
oscillator.
AVDD_RPLL_33
17
AP
Analog Power (3.3V) for RCLK PLL. Must be bypassed with 0.1uF capacitor.
Digital Video Input Port
Pin Name
No
I/O
Description
VID_CLK_1
153
I
Video port data clock input meant for Video Input – 1. Up to 135Mhz
[Input, 5V-tolerant]
VIDIN_HS
122
I
When Video Input – 1 is in BT656 Mode, this Pin acts as Horizontal Sync Input for Video
Input – 2.
OR when Video Input – 1 is in 16 Bit Mode this Pin acts as Horizontal Sync Input for Video
Input – 1.
OR this Pin acts as Horizontal Sync Input for 24 Bit Video Input
VIDIN_VS
121
I
When Video Input – 1 is in BT656 Mode, this Pin acts as Vertical Sync Input for Video Input
– 2.
OR when Video Input – 1 is in 16 Bit Mode this Pin acts as Vertical Sync Input for Video
Input – 1.
OR this Pin acts as Vertical Sync Input for 24 Bit Video Input
VID_DATA_IN_0
VID_DATA_IN_1
VID_DATA_IN_2
VID_DATA_IN_3
VID_DATA_IN_4
VID_DATA_IN_5
VID_DATA_IN_6
VID_DATA_IN_7
135
136
137
138
139
140
141
142
IO
Input YUV data in 8-bit BT656 of Video Input – 1
[Bi-Directional, 5V-tolerant]
OR Input Y Data in case of 16 Bit Video Input (CCIR601) of Video Input – 1
OR Input Green Data in case of 24 Bit Video Input
VID_DATA_IN_8
VID_DATA_IN_9
VID_DATA_IN_10
VID_DATA_IN_11
VID_DATA_IN_12
VID_DATA_IN_13
VID_DATA_IN_14
VID_DATA_IN_15
145
146
147
148
149
150
151
152
IO
Input Pr / Pb Data in case of 16 Bit Video Input (CCIR601) of Video Input – 1
OR Input Blue/ Pb Data in case of 24 Bit Video Input
VID_DATA_IN_16
VID_DATA_IN_17
VID_DATA_IN_18
VID_DATA_IN_19
VID_DATA_IN_20
VID_DATA_IN_21
VID_DATA_IN_22
123
124
125
128
129
130
131
IO
Input Red / Pr Data in case of 24 Bit Video Input
OR Video Input – 2 in 8-bit with Embedded Sync / Separate Sync
Low Bandwidth ADC Input Port